ATMEGA406-1AAU Atmel, ATMEGA406-1AAU Datasheet - Page 71

• Manufacturer Part Number: ATMEGA406-1AAU
• Description: IC AVR MCU 40K 1MHZ 48LQFP
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA406-1AAU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 1MHz
• Connectivity: I²C
• Peripherals: POR, WDT
• Number Of I /o: 18
• Program Memory Size: 40KB (20K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 512 x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 4 V ~ 25 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -30°C ~ 85°C
• Package / Case: 48-LQFP
• Processor Series: ATMEGA48x
• Core: AVR8
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: 2-Wire
• Maximum Clock Frequency: 1 MHz
• Number Of Programmable I/os: 18
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 30 C
• Cpu Family: ATmega
• Device Core: AVR
• Device Core Size: 8b
• Frequency (max): 1MHz
• Total Internal Ram Size: 2KB
• # I/os (max): 18
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5/9/12/15/18/24V
• Operating Supply Voltage (max): 25V
• Operating Supply Voltage (min): 4V
• On-chip Adc: 10-chx12-bit
• Instruction Set Architecture: RISC
• Operating Temp Range: -30C to 85C
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Controller Family/series: AVR MEGA
• No. Of I/o's: 18
• Eeprom Memory Size: 512Byte
• Ram Memory Size: 2KB
• Cpu Speed: 1MHz
• Rohs Compliant: Yes
• For Use With: 770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

2548E–AVR–07/06
• TMS/PCINT10 – Port B, Bit 2
TMS, JTAG Test Mode Select: This pin is used for navigating through the TAP-controller state
machine. When the JTAG interface is enabled, this pin can not be used as an I/O pin.
PCINT10, Pin Change Interrupt Source 10. The PB2 pin can serve as external interrupt source
to the MCU.
• TDI/PCINT9 – Port B, Bit 1
TDI, JTAG Test Data Input: Serial input data to be shifted in the Instruction Register or Data
Register (scan chains). When the JTAG Interface is enabled, this pin can not be used as I/O pin.
PCINT9, Pin Change Interrupt Source 9. The PB1 pin can serve as external interrupt source to
the MCU.
• TDO/PCINT8 – Port B, Bit 0
TDO, JTAG Test Data Output: Serial output data from Instruction Register or Data Register.
When the JTAG Interface is enabled, this pin can not be used as an I/O pin.
PCINT8, Pin Change Interrupt Source 8. The PB0 pin can serve as external interrupt source to
the MCU.
Table 13-7
shown in
Table 13-7.
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
PTOE
DIEOE
DIEOV
DI
AIO
Figure 13-5 on page
and
Overriding Signals for Alternate Functions in PB7:PB4
Table 13-8
PB7/OCOB/
PCINT15
0
0
0
0
OC0B Enable
OC0B
–
0
0
PCINT15 INPUT
–
relate the alternate functions of Port B to the overriding signals
66.
PB6/OCOA/
PCINT14
0
0
0
0
OC0A Enable
OC0A
–
0
0
PCINT14 INPUT
–
PB5/
PCINT13
0
0
0
0
–
0
0
PCINT13 INPUT
–
ATmega406
PB4/
PCINT12
0
0
0
0
0
0
–
0
0
PCINT12 INPUT
–
71