AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 183

• Manufacturer Part Number: AT91SAM7A3-AU
• Description: IC ARM7 MCU FLASH 256K 100LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A3-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, MMC, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: AT91SAM7xx
• No. Of I/o's: 62
• Ram Memory Size: 32KB
• Cpu Speed: 60MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 62
• Interface Type: CAN/SPI/I2S/TWI/USART/USB
• On-chip Adc: 2(8-chx10-bit)
• Number Of Timers: 3
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 60 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
• Minimum Operating Temperature: - 40 C
• Cpu Family: 91S
• Device Core Size: 32b
• Frequency (max): 60MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 62
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

25.3
25.3.1
25.3.2
25.3.3
25.4
25.4.1
6042E–ATARM–14-Dec-06
Product Dependencies
UART Operations
I/O Lines
Power Management
Interrupt Source
Baud Rate Generator
Depending on product integration, the Debug Unit pins may be multiplexed with PIO lines. In
this case, the programmer must first configure the corresponding PIO Controller to enable I/O
lines operations of the Debug Unit.
Depending on product integration, the Debug Unit clock may be controllable through the
Power Management Controller. In this case, the programmer must first configure the PMC to
enable the Debug Unit clock. Usually, the peripheral identifier used for this purpose is 1.
Depending on product integration, the Debug Unit interrupt line is connected to one of the
interrupt sources of the Advanced Interrupt Controller. Interrupt handling requires program-
ming of the AIC before configuring the Debug Unit. Usually, the Debug Unit interrupt line
connects to the interrupt source 1 of the AIC, which may be shared with the real-time clock,
the system timer interrupt lines and other system peripheral interrupts, as shown in
1. This sharing requires the programmer to determine the source of the interrupt when the
source 1 is triggered.
The Debug Unit operates as a UART, (asynchronous mode only) and supports only 8-bit char-
acter handling (with parity). It has no clock pin.
The Debug Unit's UART is made up of a receiver and a transmitter that operate independently,
and a common baud rate generator. Receiver timeout and transmitter time guard are not
implemented. However, all the implemented features are compatible with those of a standard
USART.
The baud rate generator provides the bit period clock named baud rate clock to both the
receiver and the transmitter.
The baud rate clock is the master clock divided by 16 times the value (CD) written in
DBGU_BRGR (Baud Rate Generator Register). If DBGU_BRGR is set to 0, the baud rate
clock is disabled and the Debug Unit's UART remains inactive. The maximum allowable baud
rate is Master Clock divided by 16. The minimum allowable baud rate is Master Clock divided
by (16 x 65536).
Baud Rate
AT91SAM7A3 Preliminary
=
-------------------- -
16
MCK
×
CD
Figure 25-
183