AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 91

IC ARM7 MCU FLASH 256K 100LQFP

AT91SAM7A3-AU

Manufacturer Part Number
AT91SAM7A3-AU
Description
IC ARM7 MCU FLASH 256K 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A3-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
CAN, I²C, MMC, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
AT91SAM7xx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
60MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
60 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
62
Interface Type
CAN/SPI/I2S/TWI/USART/USB
On-chip Adc
2(8-chx10-bit)
Number Of Timers
3
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Ram Size
32 KB
Maximum Clock Frequency
60 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
Minimum Operating Temperature
- 40 C
Cpu Family
91S
Device Core Size
32b
Frequency (max)
60MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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19.3.2.1
19.3.2.2
19.3.3
6042E–ATARM–14-Dec-06
Remap Command
Internal Memory Mapping
Internal Memory
Area 0
Within the Internal Memory address space, the Address Decoder of the Memory Controller
decodes eight more address bits to allocate 1-Mbyte address spaces for the embedded
memories.
The allocated memories are accessed all along the 1-Mbyte address space and so are
repeated n times within this address space, n equaling 1M bytes divided by the size of the
memory.
When the address of the access is undefined within the internal memory area, the Address
Decoder returns an Abort to the master.
Figure 19-3. Internal Memory Mapping
The first 32 bytes of Internal Memory Area 0 contain the ARM processor exception vectors, in
particular, the Reset Vector at address 0x0.
Before execution of the remap command, the on-chip Flash is mapped into Internal Memory
Area 0, so that the ARM7TDMI reaches an executable instruction contained in Flash. After the
remap command, the internal SRAM at address 0x0020 0000 is mapped into Internal Memory
Area 0. The memory mapped into Internal Memory Area 0 is accessible in both its original
location and at address 0x0.
After execution, the Remap Command causes the Internal SRAM to be accessed through the
Internal Memory Area 0.
As the ARM vectors (Reset, Abort, Data Abort, Prefetch Abort, Undefined Instruction, Inter-
rupt, and Fast Interrupt) are mapped from address 0x0 to address 0x20, the Remap
Command allows the user to redefine dynamically these vectors under software control.
The Remap Command is accessible through the Memory Controller User Interface by writing
the MC_RCR (Remap Control Register) RCB field to one.
The Remap Command can be cancelled by writing the MC_RCR RCB field to one, which acts
as a toggling command. This allows easy debug of the user-defined boot sequence by offering
a simple way to put the chip in the same configuration as after a reset.
256M Bytes
0x0000 0000
0x0010 0000
0x0020 0000
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x0FFF FFFF
0x0030 0000
Internal Memory Area 0
Internal Memory Area 1
Internal Memory Area 2
Undefined Areas
Internal SRAM
Internal Flash
AT91SAM7A3 Preliminary
(Abort)
1M Bytes
1M Bytes
1M Bytes
253M bytes
91

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