AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 452

• Manufacturer Part Number: AT91SAM7A3-AU
• Description: IC ARM7 MCU FLASH 256K 100LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A3-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, MMC, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: AT91SAM7xx
• No. Of I/o's: 62
• Ram Memory Size: 32KB
• Cpu Speed: 60MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 62
• Interface Type: CAN/SPI/I2S/TWI/USART/USB
• On-chip Adc: 2(8-chx10-bit)
• Number Of Timers: 3
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 60 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
• Minimum Operating Temperature: - 40 C
• Cpu Family: 91S
• Device Core Size: 32b
• Frequency (max): 60MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 62
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

34.7.1
6042E–ATARM–14-Dec-06
Command - Response Operation
The structure of commands, responses and data blocks is described in the MultiMedia-Card
System Specification. See also
MultiMediaCard bus data transfers are composed of these tokens.
There are different types of operations. Addressed operations always contain a command and
a response token. In addition, some operations have a data token; the others transfer their
information directly within the command or response structure. In this case, no data token is
present in an operation. The bits on the DAT and the CMD lines are transferred synchronous
to the clock MCI Clock.
Two types of data transfer commands are defined:
Both read and write operations allow either single or multiple block transmission. A multiple
block transmission is terminated when a stop command follows on the CMD line similarly to
the sequential read.
The MCI provides a set of registers to perform the entire range of MultiMedia Card operations.
After reset, the MCI is disabled and becomes valid after setting the MCIEN bit in the MCI_CR
Control Register.
The PWSEN bit saves power by dividing the MCI clock by 2
inactive.
The command and the response of the card are clocked out with the rising edge of the MCI
Clock.
All the timings for MultiMedia Card are defined in the MultiMediaCard System Specification.
The two bus modes (open drain and push/pull) needed to process all the operations are
defined in the MCI command register. The MCI_CMDR allows a command to be carried out.
For example, to perform an ALL_SEND_CID command:
The command ALL_SEND_CID and the fields and values for the MCI_CMDR Control Register
are described in
Table 34-4.
Note:
CMD
CMD Index
CMD2
• Sequential commands: These commands initiate a continuous data stream. They are
• Block-oriented commands: These commands send a data block succeeded by CRC bits.
terminated only when a stop command follows on the CMD line. This mode reduces the
command overhead to an absolute minimum.
1. bcr means broadcast command with response..
S
T
ALL_SEND_CID Command Description
Type
bcr
Host Command
Table 34-4
Content
(1)
Argument
[31:0] stuff bits
and
CRC
Table 34-4 on page
Table
E
34-5.
Z
N
Resp
R2
AT91SAM7A3 Preliminary
ID
******
Cycles
452.
Abbreviation
ALL_SEND_CID
Z
S
T
PWSDIV
Content
CID
+ 1 when the bus is
Command
Description
Asks all cards to send
their CID numbers on
the CMD line
Z
Z
452
Z