AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 35

IC ARM7 MCU FLASH 256K 100LQFP

AT91SAM7A3-AU

Manufacturer Part Number
AT91SAM7A3-AU
Description
IC ARM7 MCU FLASH 256K 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Datasheets

Specifications of AT91SAM7A3-AU

Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
CAN, I²C, MMC, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
AT91SAM7xx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
60MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
60 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
62
Interface Type
CAN/SPI/I2S/TWI/USART/USB
On-chip Adc
2(8-chx10-bit)
Number Of Timers
3
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Ram Size
32 KB
Maximum Clock Frequency
60 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
Minimum Operating Temperature
- 40 C
Cpu Family
91S
Device Core Size
32b
Frequency (max)
60MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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Manufacturer
Quantity
Price
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12. ARM7TDMI Processor
12.1
12.2
12.2.1
12.2.2
12.2.3
6042E–ATARM–14-Dec-06
Overview
ARM7TDMI Processor
Instruction Type
Data Type
ARM7TDMI Operating Mode
The ARM7TDMI core executes both the 32-bit ARM and 16-bit Thumb instruction sets, allow-
ing the user to trade off between high performance and high code density. The ARM7TDMI
processor implements Von Neuman architecture, using a three-stage pipeline consisting of
Fetch, Decode, and Execute stages.
The main features of the ARM7TDMI processor are:
For further details on ARM7TDMI, refer to the following ARM documents:
ARM Architecture Reference Manual (DDI 0100E)
ARM7TDMI Technical Reference Manual (DDI 0210B)
Instructions are either 32 bits long (in ARM state) or 16 bits long (in THUMB state).
ARM7TDMI supports byte (8-bit), half-word (16-bit) and word (32-bit) data types. Words must
be aligned to four-byte boundaries and half words to two-byte boundaries.
Unaligned data access behavior depends on which instruction is used where.
The ARM7TDMI, based on ARM architecture v4T, supports seven processor modes:
Mode changes may be made under software control, or may be brought about by external
interrupts or exception processing. Most application programs execute in User mode. The
• ARM7TDMI Based on ARMv4T Architecture
• Two Instruction Sets
• Three-Stage Pipeline Architecture
– ARM High-performance 32-bit Instruction Set
– Thumb High Code Density 16-bit Instruction Set
– Instruction Fetch (F)
– Instruction Decode (D)
– Execute (E)
User: The normal ARM program execution state
FIQ: Designed to support high-speed data transfer or channel process
IRQ: Used for general-purpose interrupt handling
Supervisor: Protected mode for the operating system
Abort mode: Implements virtual memory and/or memory protection
System: A privileged user mode for the operating system
Undefined: Supports software emulation of hardware coprocessors
AT91SAM7A3 Preliminary
35

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