AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 530

• Manufacturer Part Number: AT91SAM7A3-AU
• Description: IC ARM7 MCU FLASH 256K 100LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A3-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, MMC, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: AT91SAM7xx
• No. Of I/o's: 62
• Ram Memory Size: 32KB
• Cpu Speed: 60MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 62
• Interface Type: CAN/SPI/I2S/TWI/USART/USB
• On-chip Adc: 2(8-chx10-bit)
• Number Of Timers: 3
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 60 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
• Minimum Operating Temperature: - 40 C
• Cpu Family: 91S
• Device Core Size: 32b
• Frequency (max): 60MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 62
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

• SLEEP: CAN controller in Low power Mode
0 = CAN controller is not in low power mode.
1 = CAN controller is in low power mode.
This flag is automatically reset when Low power mode is disabled
• WAKEUP: CAN controller is not in Low power Mode
0 = CAN controller is in low power mode.
1 = CAN controller is not in low power mode.
When a WAKEUP event occurs, the CAN controller is synchronized with the bus activity. Messages can be transmitted or
received. The CAN controller clock must be available when a WAKEUP event occurs. This flag is automatically reset when
the CAN Controller enters Low Power mode.
• TOVF: Timer Overflow
0 = The timer has not rolled-over FFFFh to 0000h.
1 = The timer rolls-over FFFFh to 0000h.
This flag is automatically cleared by reading CAN_SR register.
• TSTP Timestamp
0 = No bus activity has been detected.
1 = A start of frame or an end of frame has been detected (according to the TEOF field in the CAN_MR register).
This flag is automatically cleared by reading the CAN_SR register.
• CERR: Mailbox CRC Error
0 = No CRC error occurred during a previous transfer.
1 = A CRC error occurred during a previous transfer.
A CRC error has been detected during last reception.
This flag is automatically cleared by reading CAN_SR register.
• SERR: Mailbox Stuffing Error
0 = No stuffing error occurred during a previous transfer.
1 = A stuffing error occurred during a previous transfer.
A form error results from the detection of more than five consecutive bit with the same polarity.
This flag is automatically cleared by reading CAN_SR register.
• AERR: Acknowledgment Error
0 = No acknowledgment error occurred during a previous transfer.
1 = An acknowledgment error occurred during a previous transfer.
An acknowledgment error is detected when no detection of the dominant bit in the acknowledge slot occurs.
This flag is automatically cleared by reading CAN_SR register.
• FERR: Form Error
0 = No form error occurred during a previous transfer
1 = A form error occurred during a previous transfer
A form error results from violations on one or more of the fixed form of the following bit fields:
This flag is automatically cleared by reading CAN_SR register.
6042E–ATARM–14-Dec-06
– CRC delimiter
– ACK delimiter
– End of frame
– Error delimiter
– Overload delimiter
AT91SAM7A3 Preliminary
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