AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 500
![IC ARM7 MCU FLASH 256K 100LQFP](/photos/6/76/67646/313-100-lqfp_sml.jpg)
AT91SAM7A3-AU
Manufacturer Part Number
AT91SAM7A3-AU
Description
IC ARM7 MCU FLASH 256K 100LQFP
Manufacturer
Atmel
Series
AT91SAMr
Specifications of AT91SAM7A3-AU
Core Processor
ARM7
Core Size
16/32-Bit
Speed
60MHz
Connectivity
CAN, I²C, MMC, SPI, SSC, UART/USART
Peripherals
POR, PWM, WDT
Number Of I /o
62
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-LQFP
Controller Family/series
AT91SAM7xx
No. Of I/o's
62
Ram Memory Size
32KB
Cpu Speed
60MHz
No. Of Timers
3
Rohs Compliant
Yes
Package
100LQFP
Device Core
ARM7TDMI
Family Name
91S
Maximum Speed
60 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
62
Interface Type
CAN/SPI/I2S/TWI/USART/USB
On-chip Adc
2(8-chx10-bit)
Number Of Timers
3
Processor Series
AT91SAMx
Core
ARM7TDMI
Data Ram Size
32 KB
Maximum Clock Frequency
60 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
Minimum Operating Temperature
- 40 C
Cpu Family
91S
Device Core Size
32b
Frequency (max)
60MHz
Total Internal Ram Size
32KB
# I/os (max)
62
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
3.3V
Operating Supply Voltage (max)
3.6V
Operating Supply Voltage (min)
3V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
100
Package Type
LQFP
For Use With
AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
AT91SAM7A3-AU
Manufacturer:
MXIC
Quantity:
1 001
Company:
Part Number:
AT91SAM7A3-AU
Manufacturer:
Atmel
Quantity:
730
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36.6.4
36.6.4.1
6042E–ATARM–14-Dec-06
CAN 2.0 Standard Features
CAN Bit Timing Configuration
All controllers on a CAN bus must have the same bit rate and bit length. At different clock fre-
quencies of the individual controllers, the bit rate has to be adjusted by the time segments.
The CAN protocol specification partitions the nominal bit time into four different segments:
Figure 36-4. Partition of the CAN Bit Time
TIME QUANTUM:
The TIME QUANTUM (TQ) is a fixed unit of time derived from the MCK period. The total num-
ber of TIME QUANTA in a bit time is programmable from 8 to 25.
SYNC SEG: SYNChronization Segment.
This part of the bit time is used to synchronize the various nodes on the bus. An edge is
expected to lie within this segment. It is 1 TQ long.
PROP SEG: PROPagation Segment.
This part of the bit time is used to compensate for the physical delay times within the network.
It is twice the sum of the signal’s propagation time on the bus line, the input comparator delay,
and the output driver delay. It is programmable to be 1,2,..., 8 TQ long.
This parameter is defined in the PROPAG field of the
PHASE SEG1, PHASE SEG2: PHASE Segment 1 and 2.
The Phase-Buffer-Segments are used to compensate for edge phase errors. These segments
can be lengthened (PHASE SEG1) or shortened (PHASE SEG2) by resynchronization.
Phase Segment 1 is programmable to be 1,2,..., 8 TQ long.
Phase Segment 2 length has to be at least as long as the Information Processing Time (IPT)
and may not be more than the length of Phase Segment 1.
These parameters are defined in the PHASE1 and PHASE2 fields of the
Register”.
INFORMATION PROCESSING TIME:
The Information Processing Time (IPT) is the time required for the logic to determine the bit
level of a sampled bit. The IPT begins at the sample point, is measured in TQ and is fixed at
2 TQ for the Atmel CAN. Since Phase Segment 2 also begins at the sample point and is the
last segment in the bit time, PHASE SEG2 shall not be less than the IPT.
SYNC_SEG
PROP_SEG
NOMINAL BIT TIME
AT91SAM7A3 Preliminary
PHASE_SEG1
”CAN Baudrate
Sample Point
PHASE_SEG2
Register”.
”CAN Baudrate
500
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