AT91SAM7A3-AU Atmel, AT91SAM7A3-AU Datasheet - Page 589

• Manufacturer Part Number: AT91SAM7A3-AU
• Description: IC ARM7 MCU FLASH 256K 100LQFP
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM7A3-AU

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: CAN, I²C, MMC, SPI, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 62
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-LQFP
• Controller Family/series: AT91SAM7xx
• No. Of I/o's: 62
• Ram Memory Size: 32KB
• Cpu Speed: 60MHz
• No. Of Timers: 3
• Rohs Compliant: Yes
• Package: 100LQFP
• Device Core: ARM7TDMI
• Family Name: 91S
• Maximum Speed: 60 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 62
• Interface Type: CAN/SPI/I2S/TWI/USART/USB
• On-chip Adc: 2(8-chx10-bit)
• Number Of Timers: 3
• Processor Series: AT91SAMx
• Core: ARM7TDMI
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 60 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM7A3-EK
• Minimum Operating Temperature: - 40 C
• Cpu Family: 91S
• Device Core Size: 32b
• Frequency (max): 60MHz
• Total Internal Ram Size: 32KB
• # I/os (max): 62
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Operating Supply Voltage (min): 3V
• Instruction Set Architecture: RISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 100
• Package Type: LQFP
• For Use With: AT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9AT91SAM7A3-EK - KIT EVAL FOR AT91SAM7A3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Revision History
6042E–ATARM–14-Dec-06
Version
6042A
6042B
Comments
23-Dec-2004 First issue
30-Sep-2005
In
Updated details of Page Programming Time.
Changed signal names VDDIN and VDDIO to VDD3V3 and VDDOUT and VDDCORE to VDD1V8. Removed
signal names GNDANA, GNDBU and GNDPLL in
“Signal Description”
Updated
Updated
Updated
Updated
Updated
Corrected start and end addresses of GPBR in Figure 9-2, “ System Controller Mapping”;.
Updated chip ID reference in
Updated
Updated SHDW_MR register with RTTWKEN bit and definition.
Updated formula in definition of CPTWKx pin in SHDW_MR register.
Updated SHDW_SR register with RTTWK bit and definition
Updated information on FMCN bit: removed note, changed bit description in MC Flash Mode Register .
Added external interrupt source type to SRCTYPE bit in AIC_SMRx register.
Section Debug Unit updated to remove all references to FORCE_NRST.
Updated bit descriptions for SRAMSIZ and ARCH in Debug Unit Chip ID Register.
Pull-up resistor value changed to 10 Ohm in
IADRSIZ[9:8] bit description changed in TWI Master Mode Register
IADR bit description changed in TWI Internal Address Register
TXCOMP bit description changed in TWI Status Register
Corrected error in text of
Corrected error in
section.
Corrected error in
Clock gating feature added in Receive and Transmit Clock Mode Registers in SSC section.
In section “Synchronous Serial Controller”, compare functions added.
PWM, added note on polarity and alignment in
“Features”
Section 5.1, ”Power Supplies”
Figure 5-1, ”3.3V System Single Power Supply Schematics”
Section 8.1 ”Embedded Memories” on page 15
Section 8.3, ”Embedded Flash”
Figure 9-1, ”System Controller Block Diagram”
Figure
, corrected number of battery backup registers in Features.
18-1,
Figure
Figure
and
“Shutdown Controller Block Diagram”
Table 4-1, “Pinout in 100-lead LQFP
Section 29.5.3.5,
29-17,
29-23,
Section 9.6, ”Debug
“Receiver Behavior when Operating with Hardware Handshaking”
“IrDA Modulation”
with new signal names and new information.
with information on standby mode for Flash.
”Parity”, in USART section.
Section 26.4.1, ”Pull-up Resistor
Section 32.5.3.3, ”Changing the Duty Cycle or the Period”
Figure 2-1, ”AT91SAM7A3 Block
Unit”.
in USART section.
with new signal names.
with correct lock region size.
to remove RTC.
Package”.
AT91SAM7A3 Preliminary
with new signal names.
Control”.
Diagram”,
Table 3-1,
in USART
.
Change
Request
Ref.
05-231
05-440
05-233
05-230
05-235
05-016
05-380
05-115,
05-306,
05-307
05-057
05-060
05-062
05-067
04-467
ix