MC908AP64CFAE Freescale Semiconductor, MC908AP64CFAE Datasheet - Page 258

• Manufacturer Part Number: MC908AP64CFAE
• Description: IC MCU 64K 8MHZ SPI 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP64CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• Package: 48LQFP
• Family Name: HC08
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Analog-to-Digital Converter (ADC)
In right justified mode the ADRH0 holds the two MSBs, and the ADRL0 holds the eight least significant
bits (LSBs), of the 10-bit result. ADRH0 and ADRL0 are updated each time a single channel ADC
conversion completes. Reading ADRH0 latches the contents of ADRL0. Until ADRL0 is read all
subsequent ADC results will be lost. (See
In left justified mode the ADRH0 holds the eight most significant bits (MSBs), and the ADRL0 holds the
two least significant bits (LSBs), of the 10-bit result. The ADRH0 and ADRL0 are updated each time a
single channel ADC conversion completes. Reading ADRH0 latches the contents of ADRL0. Until ADRL0
is read all subsequent ADC results will be lost. (See
Mode.)
In left justified sign mode the ADRH0 holds the eight MSBs with the MSB complemented, and the ADRL0
holds the two least significant bits (LSBs), of the 10-bit result. The ADRH0 and ADRL0 are updated each
time a single channel ADC conversion completes. Reading ADRH0 latches the contents of ADRL0. Until
ADRL0 is read all subsequent ADC results will be lost. (See
Justified Sign Data
256
$0059
$005A
$0059
$005A
$005A
Addr.
Addr.
$0059
Addr.
ADC Data Register High 0
ADC Data Register High 0
ADC Data Register High 0
ADC Data Register Low 0
ADC Data Register Low 0
ADC Data Register Low 0
Register Name
Register Name
Register Name
Mode.)
(ADRH0)
(ADRH0)
(ADRH0)
(ADRL0)
(ADRL0)
(ADRL0)
Figure 15-5. ADRH0 and ADRL0 in 8-Bit Truncated Mode
Figure 15-6. ADRH0 and ADRL0 in Right Justified Mode
Figure 15-7. ADRH0 and ADRL0 in Left Justified Mode
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Read:
Read:
Write:
Write:
MC68HC908AP Family Data Sheet, Rev. 4
Bit 7
Bit 7
Bit 7
AD9
AD7
AD9
AD1
R
R
R
R
R
R
0
0
0
0
0
0
0
0
Figure 15-6 . ADRH0 and ADRL0 in Right Justified
AD8
AD6
AD8
AD0
R
R
R
R
R
R
6
0
0
0
6
0
0
0
6
0
0
Figure 15-7 . ADRH0 and ADRL0 in Left Justified
AD7
AD5
AD7
R
R
R
R
R
R
5
0
0
0
5
0
0
0
5
0
0
0
Figure 15-8 ADRH0 and ADRL0 in Left
AD6
AD4
AD6
R
R
R
R
R
R
4
0
0
0
4
0
0
0
4
0
0
0
AD5
AD3
AD5
R
R
R
R
3
0
0
0
3
0
0
0
R
R
3
0
0
0
AD4
AD2
AD4
R
R
R
R
2
0
0
0
2
0
0
0
R
R
2
0
0
0
Freescale Semiconductor
AD3
AD9
AD1
AD3
R
R
R
R
1
0
0
0
1
0
0
R
R
1
0
0
0
Mode.)
Bit 0
Bit 0
AD2
AD8
AD0
Bit 0
AD2
R
R
R
R
0
0
0
0
0
R
R
0
0
0