MC908AP64CFAE Freescale Semiconductor, MC908AP64CFAE Datasheet - Page 37

• Manufacturer Part Number: MC908AP64CFAE
• Description: IC MCU 64K 8MHZ SPI 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP64CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• Package: 48LQFP
• Family Name: HC08
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Freescale Semiconductor
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Addr.
ADC Clock Control Register
Timebase Control Register
MMIIC CRC Data Register
ADC Data Register High 0
MMIIC Frequency Divider
ADC Status and Control
Register Name
MMIIC Data Receive
Unimplemented
Unimplemented
Unimplemented
Unimplemented
Unimplemented
U = Unaffected
(MMCRDR)
Figure 2-2. Control, Status, and Data Registers (Sheet 7 of 9)
(MMDRR)
(MMFDR)
Reserved
(ADICLK)
(ADSCR)
(ADRH0)
Register
Register
Register
(TBCR)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Write:
Read: MMCRCD7 MMCRCD6 MMCRCD5 MMCRCD4 MMCRCD3 MMCRCD2 MMCRCD1 MMCRCD0
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
Read:
Write:
X = Indeterminate
MC68HC908AP Family Data Sheet, Rev. 4
MMRD7
COCO
ADIV2
Bit 7
TBIF
ADx
R
R
0
0
0
0
0
0
0
0
MMRD6
ADIV1
TBR2
AIEN
ADx
R
R
6
0
0
0
0
0
0
0
0
MMRD5
ADCO
ADIV0
TBR1
ADx
R
R
5
0
0
0
0
0
0
0
0
= Unimplemented
ADICLK
MMRD4
ADCH4
TBR0
ADx
R
R
4
0
0
0
0
1
0
0
0
MODE1
MMRD3
ADCH3
TACK
ADx
R
R
3
0
0
0
0
0
1
0
0
0
MMBR2
MODE0
MMRD2
ADCH2
TBIE
ADx
R
R
R
2
0
0
1
0
1
0
0
= Reserved
MMBR1
MMRD1
ADCH1
TBON
ADx
R
R
1
0
0
0
0
1
0
0
0
Monitor ROM
MMBR0
MMRD0
ADCH0
Bit 0
ADx
R
R
R
R
0
0
0
0
1
0
0
0
37