MC908AP64CFAE Freescale Semiconductor, MC908AP64CFAE Datasheet - Page 60

• Manufacturer Part Number: MC908AP64CFAE
• Description: IC MCU 64K 8MHZ SPI 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908AP64CFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: I²C, IRSCI, SCI, SPI
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 32
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Cpu Family: HC08
• Device Core Size: 8b
• Frequency (max): 8MHz
• Interface Type: SCI/SPI
• Total Internal Ram Size: 2KB
• # I/os (max): 32
• Number Of Timers - General Purpose: 4
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• On-chip Adc: 8-chx10-bit
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Package Type: LQFP
• Controller Family/series: HC08
• No. Of I/o's: 32
• Ram Memory Size: 2KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: I2C, SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08AP
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908AP64E, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• Package: 48LQFP
• Family Name: HC08
• Maximum Speed: 8 MHz
• Operating Supply Voltage: 3.3|5 V
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Compliant

Central Processor Unit (CPU)
4.6 CPU During Break Interrupts
If a break module is present on the MCU, the CPU starts a break interrupt by:
The break interrupt begins after completion of the CPU instruction in progress. If the break address
register match occurs on the last cycle of a CPU instruction, the break interrupt begins immediately.
A return-from-interrupt instruction (RTI) in the break routine ends the break interrupt and returns the MCU
to normal operation if the break interrupt has been deasserted.
4.7 Instruction Set Summary
Table 4-1
4.8 Opcode Map
The opcode map is provided in
60
ADC #opr
ADC opr
ADC opr
ADC opr,X
ADC opr,X
ADC ,X
ADC opr,SP
ADC opr,SP
ADD #opr
ADD opr
ADD opr
ADD opr,X
ADD opr,X
ADD ,X
ADD opr,SP
ADD opr,SP
AIS #opr
AIX #opr
•
•
Source
Form
Loading the instruction register with the SWI instruction
Loading the program counter with $FFFC:$FFFD or with $FEFC:$FEFD in monitor mode
provides a summary of the M68HC08 instruction set.
Add with Carry
Add without Carry
Add Immediate Value (Signed) to SP
Add Immediate Value (Signed) to H:X
Operation
Table
Table 4-1. Instruction Set Summary
MC68HC908AP Family Data Sheet, Rev. 4
4-2.
H:X ← (H:X) + (16 « M)
SP ← (SP) + (16 « M)
A ← (A) + (M) + (C)
Description
A ← (A) + (M)
V H I N Z C
– – – – – – IMM
– – – – – – IMM
o o – o o o
o o – o o o
Effect on
CCR
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
IMM
DIR
EXT
IX2
IX1
IX
SP1
SP2
Freescale Semiconductor
9EEB
9EDB
9EE9
9ED9
AB
BB
CB
DB
EB
A9
B9
C9
D9
E9
FB
A7
AF
F9
ii
dd
hh ll
ee ff
ff
ff
ee ff
ii
dd
hh ll
ee ff
ff
ff
ee ff
ii
ii
2
3
4
4
3
2
4
5
2
3
4
4
3
2
4
5
2
2