ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 175

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

14.13 Register Summary
14.14 Interrupt Vector Summary
Table 14-8.
Note:
8077H–AVR–12/09
+0x10 to +0x1F
+0x22 to +0x25
+0x30 to +0x35
Address
+0x02D
+0x0A
+0x0B
+0x0C
+0x0D
+0x0E
+0x2A
+0x2B
+0x2C
+0x2E
+0x3A
+0x3B
+0x3C
+0x3D
+0x3E
+0x00
+0x01
+0x02
+0x03
+0x04
+0x05
+0x06
+0x07
+0x08
+0x09
+0x0F
+0x20
+0x21
+0x26
+0x27
+0x28
+0x29
+0x2F
+0x36
+0x37
+0x38
+0x39
+0x3F
Offset
0x0A
0x00
0x02
1. Only available on Timer/Counter with 4 Compare or Capture channels 16-bit.
0x4
0x6
0x8
Name
Timer/Counter
CTRLGCLR
CTRLGSET
CTRLFCLR
CTRLFSET
INTCTRLA
INTCTRLB
INTFLAGS
PERBUFH
CCABUFH
CCBBUFH
CCCBUFL
CCCBUFH
CCDBUFL
CCDBUFH
PERBUFL
CCABUFL
CCBBUFL
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
CTRLC
CTRLD
CTRLA
CTRLB
CTRLE
TEMP
CNTH
PERH
CCAH
CCBH
CCCH
CCDH
CNTL
PERL
CCAL
CCBL
CCCL
CCDL
CCC_vect
CCD_vect
ERR_vect
CCA_vect
CCB_vect
OVF_vect
Source
Interrupt vectors and their word offset address
CCDEN
CCDIF
Bit 7
-
-
-
-
-
-
-
-
-
-
-
-
-
CCCINTLVL[1:0]
(1)
(1)
EVACT[2:0]
CCCEN
CCCIF
Bit 6
Interrupt Description
Timer/Counter Overflow/Underflow Interrupt vector offset
Timer/Counter Error Interrupt vector offset
Timer/Counter Compare or Capture Channel A Interrupt vector offset
Timer/Counter Compare or Capture Channel B Interrupt vector offset
Timer/Counter Compare or Capture Channel C Interrupt vector offset
Timer/Counter Compare or Capture Channel D Interrupt vector offset
-
-
-
-
-
-
-
-
-
-
-
-
-
CCBEN
CCBIF
Bit 5
-
-
-
-
-
-
-
-
-
-
-
-
-
CCCINTLVL[1:0]
CCAEN
CCDBV
CCDBV
EVDLY
Bit 4
CCAIF
-
-
-
-
-
-
-
-
-
-
-
CCCBUF[15:8]
CCDBUF[15:8]
PERBUF[15:8]
CCABUF[15:8]
CCBBUF[15:8]
CCABUF[7:0]
CCBBUF[7:0]
CCCBUF[7:0]
CCDBUF[7:0]
PERBUF[7:0]
TEMP[7:0]
CCC[15:8]
CCD[15:8]
CNT[15:8]
PER[8:15]
CCA[15:8]
CCB[15:8]
CCA[7:0]
CCB[7:0]
CCC[7:0]
CCD[7:0]
CNT[7:0]
PER[7:0]
CCCBV
CCCBV
CPMD
Bit 3
-
-
-
-
-
-
-
-
-
ERRINTLVL[1:0]
CCBINTLVL[1:0]
CMD[1:0]
CMD[1:0]
CCBBV
CCBBV
Bit 2
CPMC
-
-
-
-
-
-
-
-
CLKSEL[3:0]
EVSEL[3:0]
WGMODE[2:0]
CCABV
CCABV
ERRIF
Bit 1
CPMB
LUPD
LUPD
-
-
-
-
-
-
-
CCAINTLVL[1:0]
OVINTLVL[1:0]
XMEGA A
BYTEM
PERBV
PERBV
OVFIF
Bit 0
CPMA
DIR
DIR
-
-
-
-
-
-
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