ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 438

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

8077H–AVR–12/09
14 TC - 16-bit Timer/Counter .................................................................... 149
15 AWeX – Advanced Waveform Extension ........................................... 176
13.2
13.3
13.4
13.5
13.6
13.7
13.8
13.9
13.10
13.11
13.12
13.13
13.14
13.15
13.16
13.17
13.18
13.19
13.20
14.1
14.2
14.3
14.4
14.5
14.6
14.7
14.8
14.9
14.10
14.11
14.12
14.13
14.14
Overview ........................................................................................................129
Using the I/O Pin ...........................................................................................130
I/O Pin Configuration .....................................................................................131
Reading the Pin value ...................................................................................133
Input Sense Configuration .............................................................................134
Port Interrupt ..................................................................................................135
Port Event ......................................................................................................136
Alternate Port Functions ................................................................................136
Slew-rate Control ...........................................................................................137
Clock and Event Output .................................................................................137
Multi-configuration .........................................................................................138
Virtual Port Registers .....................................................................................138
Register Description – Ports ..........................................................................138
Register Description – Multiport Configuration ..............................................143
Register Description – Virtual Port ................................................................146
Register Summary – Ports ............................................................................148
Register Summary – Port Configuration ........................................................148
Register Summary – Virtual Ports .................................................................148
Interrupt vector Summary - Ports ..................................................................148
Features ........................................................................................................149
Overview ........................................................................................................149
Block Diagram ...............................................................................................151
Clock and Event Sources ..............................................................................153
Double Buffering ............................................................................................153
Counter Operation .........................................................................................154
Capture Channel ...........................................................................................156
Compare Channel .........................................................................................159
Interrupts and events .....................................................................................163
DMA Support. ................................................................................................164
Timer/Counter Commands ............................................................................164
Register Description ......................................................................................165
Register Summary .........................................................................................175
Interrupt Vector Summary .............................................................................175
XMEGA A
v