ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 433

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

34.8
8077H–AVR–12/09
8077A – 02/08
28.
29.
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48.
49.
50.
1.
Removed section 21.14.6. The removed section was only for the test.
Updated the
to PORTF_PINn.
Changed connection description of CTRLA in
333. AC0OUT is connected to pin 7, not on pin 0.
Updated the
flash.
Updated
Removed
Updated
Updated
Corrected the bit 0 in
8.7 ”Register Summary - Sleep” on page
Updated the text in
Updated the table notes in the
Updated the
Updated the
Changed the initial value to FF on the RTC PERH and PERL registers in
Time Counter Period Register High” on page 193
Period Register L” on page
Added a footnote in
Updated the high byte and low byte in
page
Inserted a new
Inserted a new figure
Inserted a new figure
Inserted new sections:
361, and
Updated
Deleted 2 Chapters: “Bootloader - Self-Programming” and Extern Programming.
Removed “TRUEGND” bit from
Initial revision
48.
Figure 7-1 on page
Figure 4-1 on page
Figure 19-11 on page
”Virtual Registers” on page
”Instruction Set Summary” on page
Figure 28-4 on page 343
Table 6-3 on page 71
Section 4.1 ”Features” on page 18
Figure 6-1 on page 66
Figure 29-1 on page
Section 30. ”Memory Programming” on page
Section 9.4.6 ”Software reset” on page
Table 13-5 on page 143
Section 8.6.1 ”PR - General Power Reduction Register” on page 98
Figure 2-1 on page
Figure 3-1 on page
”EBI - External Bus Interface” on page
193.
77.
19,
Table 7-6 on page
211.
”Register Summary” on page
Figure 4-2 on page 22
345.
with a footnote and cross-references to the footnote for PORTA_PINn
and
with IRCOM.
138.
Section 4.26 ”Interrupt Vector Summary - NVM Controller” on
Figure 28-5 on page 343
101.
4.
6.
that explains the low level.
386.
Section 27.9.3 ”CTRLA – Control Register A” on page
with “Flexible Software CRC” in the feature list for the
89.
and in
and
Section 17.3.9 ”PERL - Real Time Counter
109.
Figure 4-3 on page
361.
327.
267,
and replaced by ones drawn in visio.
”Memory Programming” on page
Section 17.3.8 ”PERH - Real
24.
XMEGA A
and in
Section
433