ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 59

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

8077H–AVR–12/09
Table 5-8.
Table 5-9.
TRGSRC offset value
TRIGSRC base value
+0x00
+0x01
+0x02
0xAA
0xAB
0xAE
0x4A
0x4B
0x4E
0x6A
0x6B
0x6E
0x8A
0x8B
0x8E
0xA0
0xA6
0x00
0x01
0x10
0x15
0x20
0x25
0x40
0x46
0x60
0x66
0x80
0x86
DMA Trigger Sources, base value for all modules and peripherals
DMA Trigger sources, offset values for Event System triggers
Group Configuration
Group Configuration
USARTC0
USARTC1
USARTD0
USARTD1
USARTE0
USARTE1
USARTF0
USARTF1
ADCA
DACA
ADCB
DACB
TCC0
TCC1
TCD0
TCD1
TCE0
TCE1
TCF0
TCF1
SPIC
SPID
SPIE
SPIF
OFF
SYS
CH0
CH1
CH2
Description
Software triggers only
System DMA triggers base value
ADCA DMA triggers base value
DACA DMA trigger bas
ADCB DMA triggers base value
DACB DMA triggers base value
Timer/Counter C0 DMA triggers base value
Timer/Counter C1 triggers base value
SPI C DMA triggers value
USART C0 DMA triggers base value
USART C1 DMA triggers base value
Timer/Counter D0 DMA triggers base value
Timer/Counter D1 triggers base value
SPI D DMA triggers value
USART D0 DMA triggers base value
USART D1 DMA triggers base value
Timer/Counter E0 DMA triggers base value
Timer/Counter E1 triggers base value
SPI E DMA triggers value
USART E0 DMA triggers base value
USART E1 DMA triggers base value
Timer/Counter F0 DMA triggers base value
Timer/Counter F1 triggers base value
SPI F DMA trigger value
USART F0 DMA triggers base value
USART F1 DMA triggers base value
Description
Event Channel 0
Event Channel 1
Event Channel 2
XMEGA A
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