ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 378

• Manufacturer Part Number: ATXMEGA256A3B-MH
• Description: MCU AVR 256KB FLASH A3B 64-QFN
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA256A3B-MH

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 49
• Program Memory Size: 256KB (128K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 16x12b; D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-MLF®, 64-QFN
• Processor Series: ATXMEGA256x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 16 KB
• Interface Type: I2C, SPI, USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 49
• Number Of Timers: 7
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 12 bit, 2 Channel
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Other names: ATXMEGA256A3B-MU; ATXMEGA256A3B-MU

30.11.5.4
30.11.5.5
30.11.5.6
30.11.5.7
8077H–AVR–12/09
Write EEPROM Page
Erase & Write EEPROM Page
Read EPPROM
Erase EEPROM
The Write EEPROM Page command is used to write all locations that is loaded in the EEPROM
page buffer into one page in EEPROM. Only the locations that are loaded and tagged in the
EEPROM page buffer will be written.
1.
2.
3.
self-programming.
The BUSY flag in the NVM STATUS register will be set until the operation is finished.
The Erase & Write EEPROM Page command is used to first erase an EEPROM page and write
the EEPROM page buffer into that page in EEPROM, in one atomic operation.
1.
2.
3.
self-programming.
The BUSY flag in the NVM STATUS register will be set until the operation is finished.
The Erase EEPROM command is used to erase all the locations in all EEPROM pages that cor-
responds the loaded and tagged locations in the EEPROM page buffer.
1.
2.
self-programming.
The BUSY flag in the NVM STATUS register will be set until the operation is finished.
The Read EEPROM command is used to read one byte from the EEPROM,
1.
2.
3.
self-programming.
The data byte read will be available in the NVM DATA0.
Load the NVM CMD register with the Write EEPROM Page command.
Load the NVM ADDR register with the address for EEPROM page to write.
Set the CMDEX bit in NVM CTRLA register. This requires the timed CCP sequence during
Load the NVM CMD register with the Erase & Write EEPROM Page command.
Load the NVM ADDR register with the address for EEPROM page to write.
Set the CMDEX bit in NVM CTRLA register. This requires the timed CCP sequence during
Set up the NVM CMD register to Erase EPPROM command.
Set the CMDEX bit in NVM CTRLA register. This requires the timed CCP sequence during
Load the NVM CMD register with the Read EPPROM command.
Load the NVM ADDR register with the address to read.
Set the CMDEX bit in NVM CTRLA register. This requires the timed CCP sequence during
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