AT91SAM9XE512-CU Atmel, AT91SAM9XE512-CU Datasheet - Page 146

• Manufacturer Part Number: AT91SAM9XE512-CU
• Description: MCU ARM9 512K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE512-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 96
• Interface Type: EBI/Ethernet/SPI/TWI/USART/USB
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 6
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 180 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 20-3. Code Read Optimization in ARM Mode for FWS = 3
Note:
Figure 20-4. Code Read Optimization in ARM Mode for FWS = 4
Note:
146
Buffer 0 (128bits)
Buffer 1 (128bits)
Buffer 0 (128bits)
Buffer 1 (128bits)
ARM Request
Data To ARM
ARM Request
Flash Access
Master Clock
Flash Access
Data To ARM
Master Clock
When FWS is included between 1 and 3, in case of sequential reads, the first access takes (FWS+1) cycles, the other ones only
1 cycle.
When FWS is included between 4 and 10, in case of sequential reads, the first access takes (FWS+1) cycles, each first access
of the 128-bit read (FWS-2) cycles, and the others only 1 cycle.
(32-bit)
AT91SAM9XE128/256/512 Preliminary
(32-bit)
@Byte 0
@Byte 0
XXX
XXX
XXX
Bytes 0-15
Bytes 0-15
XXX
XXX
@4
0-3
XXX
@4
0-3
@8
4-7
@8
4-7
@12 @16
Bytes 16-31
8-11
@12 @16
8-11
Bytes 16-31
12-15
12-15
Bytes 0-15
@20
16-19 20-23
@24
@20
Bytes 0-15
16-19
@28 @32
Bytes 32-47
24-27
@24
20-23
28-31 32-35
@28 @32
Bytes 32-47
24-27
@36 @40
Bytes 16-31
28-31
Bytes 16-31
36-39
@44 @48 @52
6254C–ATARM–22-Jan-10
Bytes 48-63
@36 @40
Bytes 32-47
40-43
32-35
44-47
Bytes 48-63
36-39
Bytes 32-47
48-51