AT91SAM9XE512-CU Atmel, AT91SAM9XE512-CU Datasheet - Page 24

• Manufacturer Part Number: AT91SAM9XE512-CU
• Description: MCU ARM9 512K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE512-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 96
• Interface Type: EBI/Ethernet/SPI/TWI/USART/USB
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 6
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 180 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Figure 8-3.
8.1.5.3
8.1.5.4
24
AT91SAM9XE128/256/512 Preliminary
256, 512 or
1024 Pages
GPNVM Bits
Security Bit
Flash First Memory Plane Mapping
0x0020 0000
0x0021 FFFF
or 0x0023 FFFF
or 0x0027 FFFF
The AT91SAM9XE128/256/512 features four GPNVM bits that can be cleared or set respec-
tively through the commands “Clear GPNVM Bit” and “Set GPNVM Bit” of the EEFC User
Interface.
Table 8-2.
The AT91SAM9XE128/256/512 features a security bit, based on a specific GPNVM bit, GPN-
VMBit[0]. When the security is enabled, access to the Flash, either through the ICE interface or
through the Fast Flash Programming Interface, is forbidden. This ensures the confidentiality of
the code programmed in the Flash.
Disabling the security bit can only be achieved by asserting the ERASE pin at 1, and after a full
Flash erase is performed. When the security bit is deactivated, all accesses to the Flash are
permitted.
As the ERASE pin integrates a permanent pull-down, it can be left unconnected during normal
operation.
GPNVMBit[#]
128, 256 or 512 Kbytes
Locked Regions Area
32 bits wide
0
1
2
3
General-purpose Non volatile Memory Bits
Function
Security Bit
Brownout Detector Enable
Brownout Detector Reset Enable
Boot Mode Select (BMS)
Locked Region 7, 15 or 31
Locked Region 0
16 Kbytes
Page 0
Page 31
6254C–ATARM–22-Jan-10
512 bytes