AT91SAM9XE512-CU Atmel, AT91SAM9XE512-CU Datasheet - Page 451

MCU ARM9 512K FLASH 217-BGA

AT91SAM9XE512-CU

Manufacturer Part Number
AT91SAM9XE512-CU
Description
MCU ARM9 512K FLASH 217-BGA
Manufacturer
Atmel
Series
AT91SAMr
Datasheet

Specifications of AT91SAM9XE512-CU

Core Processor
ARM9
Core Size
16/32-Bit
Speed
180MHz
Connectivity
EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
56K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 1.95 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
217-LFBGA
Package
217LFBGA
Device Core
ARM926EJ-S
Family Name
91S
Maximum Speed
180 MHz
Operating Supply Voltage
1.8|2.5|3.3 V
Data Bus Width
32 Bit
Number Of Programmable I/os
96
Interface Type
EBI/Ethernet/SPI/TWI/USART/USB
On-chip Adc
4-chx10-bit
Number Of Timers
6
Processor Series
AT91SAMx
Core
ARM926EJ-S
Data Ram Size
32 KB
Maximum Clock Frequency
180 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
Minimum Operating Temperature
- 40 C
For Use With
AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details

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33.4.1
Table 33-3.
33.5
33.5.1
33.5.2
33.5.3
33.6
33.6.1
451
Pin Name
TWD
TWCK
Product Dependencies
Functional Description
AT91SAM9XE128/256/512 Preliminary
I/O Lines Description
I/O Lines
Power Management
Interrupt
Transfer Format
I/O Lines Description
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a current
source or pull-up resistor (see
high. The output stages of devices connected to the bus must have an open-drain or open-col-
lector to perform the wired-AND function.
TWD and TWCK pins may be multiplexed with PIO lines. To enable the TWI, the programmer
must perform the following step:
The user must not program TWD and TWCK as open-drain. It is already done by the hardware.
The TWI interface may be clocked through the Power Management Controller (PMC), thus the
programmer must first configure the PMC to enable the TWI clock.
The TWI interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). In
order to handle interrupts, the AIC must be programmed before configuring the TWI.
The data put on the TWD line must be 8 bits long. Data is transferred MSB first; each byte must
be followed by an acknowledgement. The number of bytes per transfer is unlimited (see
33-4).
Each transfer begins with a START condition and terminates with a STOP condition (see
33-3).
• Program the PIO controller to dedicate TWD and TWCK as peripheral lines.
• Enable the peripheral clock.
• A high-to-low transition on the TWD line while TWCK is high defines the START condition.
• A low-to-high transition on the TWD line while TWCK is high defines a STOP condition.
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
Figure 33-2 on page
450). When the bus is free, both lines are
Input/Output
Input/Output
6254C–ATARM–22-Jan-10
Type
Figure
Figure

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