AT91SAM9XE512-CU Atmel, AT91SAM9XE512-CU Datasheet - Page 824

• Manufacturer Part Number: AT91SAM9XE512-CU
• Description: MCU ARM9 512K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE512-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 96
• Interface Type: EBI/Ethernet/SPI/TWI/USART/USB
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 6
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 180 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Table 43-40. SPI Timings
Note:
824
Symbol
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
SPI
CLK
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
C
LOAD
AT91SAM9XE128/256/512 Preliminary
is 8 pF for MISO and 6 pF for SPCK and MOSI.
Parameter
SPCK frequency
MISO Setup time before SPCK rises
MISO Hold time after SPCK rises
SPCK rising to MOSI
MISO Setup time before SPCK falls
MISO Hold time after SPCK falls
SPCK falling to MOSI
SPCK falling to MISO
MOSI Setup time before SPCK rises
MOSI Hold time after SPCK rises
SPCK rising to MISO
MOSI Setup time before SPCK falls
MOSI Hold time after SPCK falls
NPCS0 setup to SPCK rising
NPCS0 hold after SPCK falling
NPCS0 setup to SPCK falling
NPCS0 hold after SPCK rising
NPCS0 falling to MISO valid
Figure 43-9. SPI Slave Mode 1 and 2
SPCK
MISO
MOSI
Master Mode
Slave Mode
SPI
9
Cond
SPI
10
5.14 + 0.5* t
5.72 + 0.5*t
4.7 + 0.5* t
5.8 + 0.5*t
SPI
0.091
-0.16
5.33
1.41
5.33
1.41
7.02
4.97
Min
0
0
0
0
11
CPMCK
CPMCK
CPMCK
CPMCK
15.7 + 0.5*t
14.8 +0.5* t
15.4 + 0.5*t
14.5 + 0.5*t
18.55
Max
0.44
0.15
14.7
14.7
47
6254C–ATARM–22-Jan-10
CPMCK
CPMCK
CPMC
CPMC
Units
MHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns