AT91SAM9XE512-CU Atmel, AT91SAM9XE512-CU Datasheet - Page 845

• Manufacturer Part Number: AT91SAM9XE512-CU
• Description: MCU ARM9 512K FLASH 217-BGA
• Manufacturer: Atmel
• Series: AT91SAMr

Specifications of AT91SAM9XE512-CU

• Core Processor: ARM9
• Core Size: 16/32-Bit
• Speed: 180MHz
• Connectivity: EBI/EMI, Ethernet, I²C, MMC, SPI, SSC, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 96
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 56K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 217-LFBGA
• Package: 217LFBGA
• Device Core: ARM926EJ-S
• Family Name: 91S
• Maximum Speed: 180 MHz
• Operating Supply Voltage: 1.8|2.5|3.3 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 96
• Interface Type: EBI/Ethernet/SPI/TWI/USART/USB
• On-chip Adc: 4-chx10-bit
• Number Of Timers: 6
• Processor Series: AT91SAMx
• Core: ARM926EJ-S
• Data Ram Size: 32 KB
• Maximum Clock Frequency: 180 MHz
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JTRACE-ARM-2M, KSK-AT91SAM9XE-PL, MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: AT91SAM-ICE, AT91-ISP, AT91SAM9XE-EK
• Minimum Operating Temperature: - 40 C
• For Use With: AT91SAM9XE-EK - KIT EVAL FOR AT91SAM9XEAT91SAM-ICE - EMULATOR FOR AT91 ARM7/ARM9
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Revision History
6254C–ATARM–22-Jan-10
Doc
Rev.
6254C
Comments
Overview:
Table 3-1, “Signal Description
removed. Cross reference referring to PIO Multiplexing added to these signals.
Table 10-3, “Multiplexing on PIO Controller
Table 10-4, “Multiplexing on PIO Controller
Figure 8-1 “AT91SAM9XE128/256/512 Memory
Section 6.1 “ERASE
Section 7.2.2 “Matrix Slaves”
Slave order changed in
Section 8.1.4 “ROM Topology”
Section 8.1.4.1 “Fast Flash Programming
Table 3-1, “Signal Description
Section 9.2 “Reset
Section 8.2.5 “I/O Drive
GLobal: KB rewritten as -Kbyte or Kbytes, MB as Mbytes or -Mbyte (conform to style guide; lit° 3363B)
EFC:
Section 20.3.3.2 “Write
“Example of Partial Page
EMAC:
Section 38. “Ethernet MAC 10/100 (EMAC)”
FFPI:
Figure 14-1 “Parallel Programming Interface”
TST is connected to VDDBU, added PGMEN3.
Table 14-1, “Signal Description List”
Backup Power supply, TST is connected to by VDDBU, added PGMEN3.
Section 14.2.3 “Entering Programming Mode”
removed VDDFLASH from algorithm.
MATRIX:
Section 21.6.1 “EBI Chip Select Assignment
VDDIOMSEL.
SHDWC:
Section 19.6.3 “Shutdown Status
SMC:
Table 23-8, “Register
Section 23.8.6 “Reset Values of Timing
In the tables that follow the most recent version of the document appears first.
Controller”, added: “At reset the NRST pin is an output”.
Pin”, ERASE pin is powered by VDDIOP0 rail.
Mapping”, SMC_CYCLE reset is 0x00030003.
Commands”, added consraint on partial programming mode below
Table 7-2
Selection”, added to datasheet.
Programming”.
and
List”, PCKx, DBGU, AIC, PIOC, USART, SSC, TC, SPI, TWI voltage references
List”, PGMEN[3:0] replaces PGMEN[2:0].
and
Register”, bitfield 16 contains RTTWK.
Section 7.2.3 “Masters to Slaves Access”
and
Figure 8-2 “ROM Boot Memory
and
Table 7-3
Parameters”, replaced redundant Table 23-5 with ref. to
AT91SAM9XE128/256/512 Preliminary
Table 14-17, “Signal Description
Interface”, added PA3.
B”, PB16 to PB21, Peripheral A column updated.
C”, PC0 to PC3, Power Supply column updated.
WOL bit description and other related text removed from section. 6789
Register”, bitfield [17:16] changed to EBI_DRIVE, replaces
and
and
Mapping”, GPBR addresses changed.
Figure 14-4 “Serial
Section 14.3.2 “Entering Serial Programming
Table
Map”, added PA3.
Programming”, removed VDDFLASH,
8-1, added PGMEN3 and PA3.
List”, removed VDDFLASH, added
Figure 20-7
Table
Mode”,
23-8.
Change
Request
Ref.
6401
6767
6927
6768
techpubs/rfo
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6863
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