P89LPC9341FDH,512 NXP Semiconductors, P89LPC9341FDH,512 Datasheet - Page 41

• Manufacturer Part Number: P89LPC9341FDH,512
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC9341FDH,512

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8 bit, 4 Channel)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288632512

NXP Semiconductors
P89LPC9331_9341_9351_9361
Product data sheet
7.20.6 Timer overflow toggle output
7.22.1 CCU clock
7.22.2 CCUCLK prescaling
7.22.3 Basic timer operation
7.21 RTC/system timer
7.22 CCU (P89LPC9351/9361)
Timers 0 and 1 can be configured to automatically toggle a port output whenever a timer
overflow occurs. The same device pins that are used for the T0 and T1 count inputs are
also used for the timer toggle outputs. The port outputs will be a logic 1 prior to the first
timer overflow when this mode is turned on.
The P89LPC9331/9341/9351/9361 has a simple RTC that allows a user to continue
running an accurate timer while the rest of the device is powered down. The RTC can be
a wake-up or an interrupt source. The RTC is a 23-bit down counter comprised of a 7-bit
prescaler and a 16-bit loadable down counter. When it reaches all logic 0s, the counter will
be reloaded again and the RTCF flag will be set. The clock source for this counter can be
either the CPU clock (CCLK) or the XTAL oscillator. Only power-on reset and watchdog
reset will reset the RTC and its associated SFRs to the default state.
The 16-bit loadable counter portion of the RTC is readable by reading the RTCDATL and
RTCDATH registers.
This unit features:
The CCU runs on the CCUCLK, which is either PCLK in basic timer mode, or the output of
a PLL. The PLL is designed to use a clock source between 0.5 MHz to 1 MHz that is
multiplied by 32 to produce a CCUCLK between 16 MHz and 32 MHz in PWM mode
(asymmetrical or symmetrical). The PLL contains a 4-bit divider to help divide PCLK into a
frequency between 0.5 MHz and 1 MHz.
This CCUCLK can further be divided down by a prescaler. The prescaler is implemented
as a 10-bit free-running counter with programmable reload at overflow.
The timer is a free-running up/down counter with a direction control bit. If the timer
counting direction is changed while the counter is running, the count sequence will be
reversed. The timer can be written or read at any time.
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A 16-bit timer with 16-bit reload on overflow.
Selectable clock, with prescaler to divide clock source by any integral number
between 1 and 1024.
Four compare/PWM outputs with selectable polarity
Symmetrical/asymmetrical PWM selection
Two capture inputs with event counter and digital noise rejection filter
Seven interrupts with common interrupt vector (one overflow, two capture, four
compare)
Safe 16-bit read/write via shadow registers.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 10 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC9331/9341/9351/9361
© NXP B.V. 2011. All rights reserved.
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