P89LPC9341FDH,512 NXP Semiconductors, P89LPC9341FDH,512 Datasheet - Page 9

• Manufacturer Part Number: P89LPC9341FDH,512
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC9341FDH,512

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8 bit, 4 Channel)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288632512

NXP Semiconductors
Table 3.
P89LPC9331_9341_9351_9361
Product data sheet
Symbol
P0.6/CMP1/KBI6
P0.7/T1/KBI7
P1.0 to P1.7
P1.0/TXD
P1.1/RXD
P1.2/T0/SCL
P1.3/INT0/SDA
P1.4/INT1
P1.5/RST
P1.6/OCB
P1.7/OCC/AD00
Pin description
Pin
PLCC28,
TSSOP28
20
19
18
17
12
11
10
6
5
4
…continued
Type Description
I/O
O
I
I/O
I/O
I
I/O, I
[1]
I/O
O
I/O
I
I/O
I/O
I/O
I/O
I
I/O
I/O
I
I
I
I/O
O
I/O
O
I
P0.6 — Port 0 bit 6. High current source.
CMP1 — Comparator 1 output.
KBI6 — Keyboard input 6.
P0.7 — Port 0 bit 7. High current source.
T1 — Timer/counter 1 external count input or overflow output.
KBI7 — Keyboard input 7.
Port 1: Port 1 is an 8-bit I/O port with a user-configurable output type, except for
three pins as noted below. During reset Port 1 latches are configured in the input
only mode with the internal pull-up disabled. The operation of the configurable
Port 1 pins as inputs and outputs depends upon the port configuration selected.
Each of the configurable port pins are programmed independently. Refer to
Section 7.16.1 “Port configurations”
details. P1.2 to P1.3 are open drain when used as outputs. P1.5 is input only.
All pins have Schmitt trigger inputs.
Port 1 also provides various special functions as described below:
P1.0 — Port 1 bit 0.
TXD — Transmitter output for serial port.
P1.1 — Port 1 bit 1.
RXD — Receiver input for serial port.
P1.2 — Port 1 bit 2 (open-drain when used as output).
T0 — Timer/counter 0 external count input or overflow output (open-drain when
used as output).
SCL — I
P1.3 — Port 1 bit 3 (open-drain when used as output).
INT0 — External interrupt 0 input.
SDA — I
P1.4 — Port 1 bit 4. High current source.
INT1 — External interrupt 1 input.
P1.5 — Port 1 bit 5 (input only).
RST — External Reset input during power-on or if selected via UCFG1. When
functioning as a reset input, a LOW on this pin resets the microcontroller, causing
I/O ports and peripherals to take on their default states, and the processor begins
execution at address 0. Also used during a power-on sequence to force ISP mode.
P1.6 — Port 1 bit 6. High current source.
OCB — Output Compare B. (P89LPC9351/9361)
P1.7 — Port 1 bit 7. High current source.
OCC — Output Compare C. (P89LPC9351/9361)
AD00 — ADC0 channel 0 analog input.
All information provided in this document is subject to legal disclaimers.
2
Rev. 5 — 10 January 2011
2
C-bus serial clock input/output.
C-bus serial data input/output.
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC9331/9341/9351/9361
and
Table 12 “Static characteristics”
© NXP B.V. 2011. All rights reserved.
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