P89LPC9341FDH,512 NXP Semiconductors, P89LPC9341FDH,512 Datasheet - Page 51

• Manufacturer Part Number: P89LPC9341FDH,512
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC9341FDH,512

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8 bit, 4 Channel)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288632512

NXP Semiconductors
P89LPC9331_9341_9351_9361
Product data sheet
7.26 Analog comparators
Two analog comparators are provided on the P89LPC9331/9341/9351/9361. Input and
output options allow use of the comparators in a number of different configurations.
Comparator operation is such that the output is a logical one (which may be read in a
register and/or routed to a pin) when the positive input (one of two selectable inputs) is
greater than the negative input (selectable from a pin or an internal reference voltage).
Otherwise the output is a zero. Each comparator may be configured to cause an interrupt
when the output value changes.
In P89LPC9351/9361, the positive inputs of comparators could be amplified by
Programmable Gain Amplifier 1 (PGA1) module. The PGA1 can supply gain factors of 2x,
4x, 8x, or 16x, eliminating the need for external op-amps in the end application.
The overall connections to both comparators are shown in
comparators function to V
When each comparator is first enabled, the comparator output and interrupt flag are not
guaranteed to be stable for 10 μs. The corresponding comparator interrupt should not be
enabled during that time, and the comparator interrupt flag must be cleared before the
interrupt is enabled in order to prevent an immediate interrupt service.
When a comparator is disabled the comparator’s output, COn, goes HIGH. If the
comparator output was LOW and then is disabled, the resulting transition of the
comparator output from a LOW to HIGH state will set the comparator flag, CMFn. This will
cause an interrupt if the comparator interrupt is enabled. The user should therefore
disable the comparator interrupt prior to disabling the comparator. Additionally, the user
should clear the comparator flag, CMFn, after disabling the comparator.
Fig 19. SPI single master multiple slaves configuration
GENERATOR
8-BIT SHIFT
SPI CLOCK
REGISTER
master
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 10 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
DD
MISO
MOSI
SPICLK
port
port
P89LPC9331/9341/9351/9361
= 2.4 V.
SPICLK
SPICLK
MISO
MOSI
MISO
MOSI
Figure 20
SS
SS
8-BIT SHIFT
8-BIT SHIFT
REGISTER
REGISTER
and
© NXP B.V. 2011. All rights reserved.
slave
slave
Figure
002aaa903
21. The
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