P89LPC9341FDH,512 NXP Semiconductors, P89LPC9341FDH,512 Datasheet - Page 55

• Manufacturer Part Number: P89LPC9341FDH,512
• Description: IC 80C51 MCU FLASH 8K 28-TSSOP
• Manufacturer: NXP Semiconductors
• Series: LPC900r

Specifications of P89LPC9341FDH,512

• Program Memory Type: FLASH
• Program Memory Size: 8KB (8K x 8)
• Package / Case: 28-TSSOP
• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 18MHz
• Connectivity: I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 26
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x8b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: P89LPC
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: I2C, SPI, UART
• Maximum Clock Frequency: 18 MHz
• Number Of Programmable I/os: 23
• Number Of Timers: 2
• Operating Supply Voltage: 2.4 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 2 (8 bit, 4 Channel)
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 568-1758 - BOARD EVAL FOR LPC93X MCU FAMILY
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 935288632512

NXP Semiconductors
P89LPC9331_9341_9351_9361
Product data sheet
7.29.3 Data EEPROM (P89LPC9351/9361)
7.30.1 General description
7.30.2 Features
7.30 Flash program memory
The P89LPC9351/9361 has 512 bytes of on-chip Data EEPROM. The Data EEPROM is
SFR based, byte readable, byte writable, and erasable (via row fill and sector fill). The
user can read, write and fill the memory via SFRs and one interrupt. This Data EEPROM
provides 100,000 minimum erase/program cycles for each byte.
After the operation finishes, the hardware will set the EEIF bit, which if enabled will
generate an interrupt. The flag is cleared by software.
Remark: When voltage supply is lower than 2.4 V, the BOD EEPROM is tripped and Data
EEPROM program or erase is blocked. EWERR1 and EWERR0 bits are used to indicate
the write error for BOD EEPROM. Both can be cleared by power-on reset, watchdog reset
or software write.
The P89LPC9331/9341/9351/9361 flash memory provides in-circuit electrical erasure and
programming. The flash can be erased, read, and written as bytes. The Sector and Page
Erase functions can erase any flash sector (1 kB) or page (64 bytes). The Chip Erase
operation will erase the entire program memory. ICP using standard commercial
programmers is available. In addition, IAP and byte-erase allows code memory to be used
for non-volatile data storage. On-chip erase and write timing generation contribute to a
user-friendly programming interface. The P89LPC9331/9341/9351/9361 flash reliably
stores memory contents even after 100,000 erase and program cycles. The cell is
designed to optimize the erase and programming mechanisms. The
P89LPC9331/9341/9351/9361 uses V
Program/Erase algorithms. When voltage supply is lower than 2.4 V, the BOD FLASH is
tripped and flash erase/program is blocked.
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Byte mode: In this mode, data can be read and written one byte at a time.
Row fill: In this mode, the addressed row (64 bytes) is filled with a single value. The
entire row can be erased by writing 00H.
Sector fill: In this mode, all 512 bytes are filled with a single value. The entire sector
can be erased by writing 00H.
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ISP/IAP/ICP.
Internal fixed boot ROM, containing low-level IAP routines available to user code.
Default loader providing ISP via the serial port, located in upper end of user program
memory.
Boot vector allows user-provided flash loader code to reside anywhere in the flash
memory space, providing flexibility to the user.
Any flash program/erase operation in 2 ms.
Programming with industry-standard commercial programmers.
All information provided in this document is subject to legal disclaimers.
Rev. 5 — 10 January 2011
8-bit microcontroller with accelerated two-clock 80C51 core
P89LPC9331/9341/9351/9361
DD
as the supply voltage to perform the
© NXP B.V. 2011. All rights reserved.
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