R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 1259

MCU 128KKB FLASH 48K 144-LQFP

R4F24568NVFQV

Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of R4F24568NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Quantity:
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H8S/2456, H8S/2456R, H8S/2454 Group
24.2.5
Module stop function can be set for individual on-chip peripheral modules.
When an MSTP bit in MSTPCR, EXMSTPCR, or RMMSTPCR is set to 1, the corresponding
module stops operation at the end of the bus cycle and a transition is made to module stop state.
The CPU continues operating independently.
When an MSTP bit is cleared to 0, the corresponding module stop state is cleared and the module
starts operating at the end of the bus cycle. In module stop state, part of SCI registers and the
internal state of SSU are reset but the internal states of the other modules are retained.
After reset clearance, all modules other than the EXDMAC*, DMAC, DTC, and on-chip RAM are
in module stop state.
The module registers that are set in module stop state cannot be read or written to.
The module-stop function for RAM is only effective for on-chip RAM. When an area of on-chip
RAM is set up as an external address space by bits RAME and EXPE in SYSCR, the resulting
external space is accessible regardless of the module-stop setting. Table 24.3 lists the kinds of
operation in case of access to the on-chip RAM area.
Note: * The EXDMAC is not supported by the H8S/2454 Group.
Table 24.3 Combinations of SYSCR Settings and Operation in Access to On-Chip RAM
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
Register Settings
RAME
1
0
EXPE
X
1
0
Module Stop Function
mstp
1
0
X
X
Target for Access Description
On-chip RAM
External address
space
This area is not readable/writable and access is
prohibited.
This area is not readable/writable and access is
prohibited.
Section 24 Power-Down Modes
Page 1229 of 1392

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