R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 994
![MCU 128KKB FLASH 48K 144-LQFP](/photos/28/61/286117/144-lqfp__plqp0144ka-a_sml.jpg)
R4F24568NVFQV
Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Specifications of R4F24568NVFQV
Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
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Section 16 USB Function Module (USB)
16.3.15 EP3 Data Register (EPDR3)
EPDR3 is a 16-byte transmit FIFO buffer for endpoint 3. EPDR3 holds one packet of transmit data
for the interrupt transfer of endpoint 3. Transmit data is fixed by writing one packet of data and
setting EP3 PKTE in trigger register 1. This FIFO buffer can be initialized by means of EP3 CLR
in FCLR register 1.
16.3.16 EP0o Receive Data Size Register (EPSZ0o)
EPSZ0o indicates the number of bytes received at endpoint 0 from the host.
16.3.17 EP1 Receive Data Size Register (EPSZ1)
EPSZ1 is a receive data size resister for endpoint 1. EPSZ1 indicates the number of bytes received
from the host. The FIFO for endpoint 1 has a dual-buffer configuration. The size of the received
data indicated by this register is the size of the currently selected side (can be read by CPU).
Page 964 of 1392
Bit
7 to 0
Bit
7 to 5
4 to 0
Bit
7
6 to 0
Bit Name
D7 to D0
Bit Name
⎯
D4 to D0
Bit Name
⎯
D6 to D0
Initial
Value
Undefined W
Initial
Value
All 0
All 0
Initial
Value
0
All 0
R/W
R/W
⎯
R
R/W
⎯
R
Description
Data register for endpoint 3 transfer
Description
Reserved
These bits are always read as 0.
Number of receive data for endpoint 0
Description
Reserved
This bit is always read as 0.
Number of received bytes for endpoint 1
H8S/2456, H8S/2456R, H8S/2454 Group
REJ09B0467-0350 Rev. 3.50
Jul 07, 2010
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