R4F24568NVFQV Renesas Electronics America, R4F24568NVFQV Datasheet - Page 250

MCU 128KKB FLASH 48K 144-LQFP

R4F24568NVFQV

Manufacturer Part Number
R4F24568NVFQV
Description
MCU 128KKB FLASH 48K 144-LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2400r
Datasheets

Specifications of R4F24568NVFQV

Core Processor
H8S/2600
Core Size
16/32-Bit
Speed
32MHz
Connectivity
EBI/EMI, I²C, IrDA, SCI, SSU, UART/USART, USB
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
96
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
48K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 2x8b
Oscillator Type
External
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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Manufacturer
Quantity
Price
Part Number:
R4F24568NVFQV
Manufacturer:
REA
Quantity:
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Part Number:
R4F24568NVFQV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Section 6 Bus Controller (BSC)
(2)
In the data cycle, program wait insertion and pin wait insertion by the WAIT pin are enabled in the
same way as in the basic bus interface. For details, refer to section 6.5.4, Wait Control. Wait
control settings do not affect the address cycles.
6.6.7
In the address/data multiplexed I/O interface, the read strobe timing of data cycles can be modified
in the same way as in the basic bus interface. For details, refer to section 6.5.5, Read Strobe (RD)
Timing. Figure 6.30 shows an example when the read strobe timing is modified.
Page 220 of 1392
RDNn = 0
RDNn = 1
Data Cycle
Read Strobe (RD) Timing
Note: n = 6, 7
AD15 to AD8
AD15 to AD8
Address bus
Figure 6.30 Example of Read Strobe Timing
CSn
RD
RD
AH
φ
Tma1
Address cycle
Address
Address
Tma2
T1
H8S/2456, H8S/2456R, H8S/2454 Group
Data cycle
REJ09B0467-0350 Rev. 3.50
Read
data
T2
Read
data
Jul 07, 2010

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