HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 12

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
2.8
2.9
Section 3 MCU Operating Modes .......................................................................51
3.1
3.2
3.3
3.4
Section 4 Exception Handling .............................................................................57
4.1
4.2
4.3
4.4
4.5
4.6
4.7
4.8
Section 5 Interrupt Controller..............................................................................67
5.1
5.2
5.3
5.4
5.5
5.6
Rev. 7.00 Sep. 11, 2009 Page x of xxxiv
REJ09B0211-0700
Processing States.................................................................................................................. 48
Usage Notes ......................................................................................................................... 49
2.9.1
Operating Mode Selection ................................................................................................... 51
Register Descriptions ........................................................................................................... 51
3.2.1
3.2.2
Pin Functions in Each Operating Mode ............................................................................... 54
3.3.1
Address Map ........................................................................................................................ 55
Exception Handling Types and Priority ............................................................................... 57
Exception Sources and Exception Vector Table .................................................................. 57
Reset..................................................................................................................................... 59
4.3.1
4.3.2
4.3.3
Traces................................................................................................................................... 62
Interrupts .............................................................................................................................. 62
Trap Instruction.................................................................................................................... 63
Stack Status after Exception Handling................................................................................. 64
Usage Note........................................................................................................................... 65
Features ................................................................................................................................ 67
Input/Output Pins ................................................................................................................. 69
Register Descriptions ........................................................................................................... 69
5.3.1
5.3.2
5.3.3
5.3.4
Interrupt ............................................................................................................................... 75
5.4.1
5.4.2
Interrupt Exception Handling Vector Table......................................................................... 76
Interrupt Control Modes and Interrupt Operation ................................................................ 79
5.6.1
Usage Notes on Bit Manipulation Instructions ....................................................... 49
Mode Control Register (MDCR) ............................................................................ 52
System Control Register (SYSCR) ......................................................................... 53
Pin Functions .......................................................................................................... 54
Reset Exception Handling....................................................................................... 59
Interrupts after Reset............................................................................................... 61
State of On-Chip Supporting Modules after Reset Release .................................... 61
Interrupt Priority Registers A to H, J, K, M
(IPRA to IPRH,IPRJ, IPRK, IPRM) ....................................................................... 70
IRQ Enable Register (IER) ..................................................................................... 71
IRQ Sense Control Registers H and L (ISCRH, ISCRL)........................................ 71
IRQ Status Register (ISR)....................................................................................... 74
External Interrupts .................................................................................................. 75
Internal Interrupts.................................................................................................... 76
Interrupt Control Mode 0 ........................................................................................ 79

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