HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 51

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
2.1.2
In comparison to the H8/300 CPU, the H8S/2600 CPU has the following enhancements:
• More general registers and control registers
• Expanded address space
• Enhanced addressing
• Enhanced instructions
• Higher speed
2.1.3
In comparison to the H8/300H CPU, the H8S/2600 CPU has the following enhancements:
• Additional control register
• Enhanced instructions
• Higher speed
⎯ Eight 16-bit expanded registers, and one 8-bit and two 32-bit control registers, have been
⎯ Normal mode supports the same 64-kbyte address space as the H8/300 CPU.
⎯ Advanced mode supports a maximum 16-Mbyte address space.
⎯ The addressing modes have been enhanced to make effective use of the 16-Mbyte address
⎯ Addressing modes of bit-manipulation instructions have been enhanced.
⎯ Signed multiply and divide instructions have been added.
⎯ A multiply-and-accumulate instruction has been added.
⎯ Two-bit shift instructions have been added.
⎯ Instructions for saving and restoring multiple registers have been added.
⎯ A test and set instruction has been added.
⎯ Basic instructions execute twice as fast.
⎯ One 8-bit and two 32-bit control registers have been added.
⎯ Addressing modes of bit-manipulation instructions have been enhanced.
⎯ A multiply-and-accumulate instruction has been added.
⎯ Two-bit shift instructions have been added.
⎯ Instructions for saving and restoring multiple registers have been added.
⎯ A test and set instruction has been added.
⎯ Basic instructions execute twice as fast.
added.
space.
Differences from H8/300 CPU
Differences from H8/300H CPU
Rev. 7.00 Sep. 11, 2009 Page 15 of 566
REJ09B0211-0700
Section 2 CPU

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