HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 507

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Notes: 1. Data transfer is performed by byte transfer. The lower 8 bits of the first address written
Reprogram Data Computation Table
2. Verify data is read in 16-bit (word) units.
3. Reprogram data is determined by the operation shown in the table below (comparison between
4. A 128-byte area for storing program data, a 128-byte area for storing reprogram data, and a 128-byte area for storing additional data must be provided in RAM.
5. A write pulse of 30 s or 200 μs is applied according to the progress of the programming operation. See note 6 for details of the pulse widths.
7. The wait times and value of N are shown in section 21.5, Flash Memory characteristics.
Original Data
to must be H'00 or H'80. A 128-byte data transfer must be performed even if writing fewer
than 128 bytes; in this case, H'FF data must be written to the extra addresses.
the data stored in the program data area and the verify data). Bits for which the reprogram data is 0 are programmed in the next reprogramming loop.
Therefore, even bits for which programming has been completed will be subjected to programming once again if the result of the subsequent verify operation is NG.
The contents of the reprogram data area and additional data area are modified as programming proceeds.
When writing of additional-programming data is executed, a 10 μs write pulse should be applied. Reprogram data X' means reprogram data when the write pulse is applied.
(D)
Note: 6. Write Pulse Width
Note: * Use a 10 μs write pulse for additional programming.
0
0
1
1
Number of Writes n
Write pulse application subroutine
Clear PSU bit in FLMCR1
Verify Data
Set PSU bit in FLMCR1
1000
Clear P bit in FLMCR1
998
999
10
11
12
13
Set P bit in FLMCR1
1
2
3
4
5
6
7
8
9
Reprogram data storage
Additional-programming
Apply Write Pulse
(V)
Program data storage
0
1
0
1
Wait (t
Wait (t
data storage area
WDT enable
Wait (t
Wait (t
Disable WDT
area (128 bytes)
area (128 bytes)
End Sub
(128 bytes)
RAM
spsu
cpsu
Reprogram Data
sp
cp
) μs
) μs
) μs
) μs
Write Time (tsp) μs
(X)
1
0
1
1
Figure 18.9 Program/Program-Verify Flowchart
200
200
200
200
200
200
200
200
200
200
30
30
30
30
30
30
*
*
*
*
*
*
Programming completed
Programming incomplete; reprogram
Still in erased state; no action
*
*
*
*
Start of programming
End of programming
7
5
7
7
*
7
Comments
Increment address
Successively write 128-byte data from additional-
programming data area in RAM to flash memory
Additional-Programming Data Computation Table
Reprogram Data
No
Apply Write Pulse (Additional programming)
Transfer reprogram data to reprogram data area
Additional-programming data computation
Transfer additional-programming data to
Store 128-byte program data in program
data area consecutively to flash memory
Write 128-byte data in RAM reprogram
(X')
H'FF dummy write to verify address
0
0
1
1
data area and reprogram data area
additional-programming data area
Clear SWE bit in FLMCR1
Reprogram data computation
data verification completed?
Set SWE bit in FLMCR1
Clear PV bit in FLMCR1
Set PV bit in FLMCR1
Start of programming
End of programming
Apply
Wait (t
Wait (t
Read verify data
Wait (t
Wait (t
Wait (t
Verify Data
Yes
Yes
Write data =
verify data?
Yes
128-byte
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Rev. 7.00 Sep. 11, 2009 Page 471 of 566
m = 0 ?
m = 0
6
n = 1
6
(V)
Write pulse
0
1
0
1
sswe
≥
cswe
≥
spvr
spv
cpv
n ?
n?
Yes
Yes
Sub-Routine-Call
Sub-Routine-Call
) μs
) μs
) μs
) μs
) μs
Programming Data (Y)
Additional-
No
No
No
0
1
1
1
*
No
*
*
*
*
*
*
*
*
*
See Note *6 for pulse width
7
7
7
4
1
7
2
4
3
4
*
m = 1
1
Additional programming to be executed
Additional programming not to be executed
Additional programming not to be executed
Additional programming not to be executed
Perform programming in the erased state.
Do not perform additional programming
on previously programmed addresses.
Clear SWE bit in FLMCR1
Programming failure
Wait (t
Comments
n ≥ (N)?
cswe
Yes
REJ09B0211-0700
) μs
Section 18 ROM
*
7
No
n ← n + 1
*
Reprogram
7