HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 145

• Manufacturer Part Number: HD64F2612FA20
• Description: IC H8S MCU FLASH 128K 80QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2600r

Specifications of HD64F2612FA20

• Core Processor: H8S/2600
• Core Size: 16-Bit
• Speed: 20MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 43
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 80-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

8.2.8
DTVECR is an 8-bit readable/writable register that enables or disables DTC activation by
software, and sets a vector number for the software activation interrupt.
Bit
7
6
5
4
3
2
1
0
8.3
The DTC operates when activated by an interrupt or by a write to DTVECR by software. An
interrupt request can be directed to the CPU or DTC, as designated by the corresponding DTCER
bit. At the end of a data transfer (or the last consecutive transfer in the case of chain transfer), the
activation source or corresponding DTCER bit is cleared. The activation source flag, in the case of
RXI_0, for example, is the RDRF flag of SCI_0.
When an interrupt has been designated a DTC activation source, the existing CPU mask level and
interrupt controller priorities have no effect. If there is more than one activation source at the same
time, the DTC operates in accordance with the default priorities.
Figure 8.2 shows a block diagram of activation source control. For details, see section 5, Interrupt
Controller.
Bit Name
SWDTE
DTVEC6
DTVEC5
DTVEC4
DTVEC3
DTVEC2
DTVEC1
DTVEC0
DTC Vector Register (DTVECR)
Activation Sources
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
DTC Software Activation Enable
Setting this bit to 1 activates DTC. Only 1 can be
written to this bit.
[Clearing conditions]
•
•
When the DISEL bit is 1 and data transfer has ended
or when the specified number of transfers have
ended, this bit will not be cleared.
DTC Software Activation Vectors 0 to 6
These bits specify a vector number for DTC software
activation.
The vector address is expressed as H'0400 + (vector
number × 2). For example, when DTVEC6 to
DTVEC0 = H'10, the vector address is H'0420. When
the bit SWDTE is 0, these bits can be written.
When the DISEL bit is 0 and the specified
number of transfers have not ended
When 0 s written to the DISEL bit after a
software-activated data transfer end interrupt
(SWDTEND) request has been sent to the CPU.
Rev. 7.00 Sep. 11, 2009 Page 109 of 566
Section 8 Data Transfer Controller (DTC)
REJ09B0211-0700