HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 330

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Part Number
Manufacturer
Quantity
Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
Quantity:
20 000
Part Number:
HD64F2612FA20J
Manufacturer:
RENESAS/瑞萨
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Section 12 Programmable Pulse Generator (PPG)
12.4.4
Figure 12.5 shows an example in which pulse output is used for cyclic five-phase pulse output.
1. Set up TGRA of the TPU that is used as the output trigger to be an output compare register. Set
2. Write H'F8 in P1DDR and NDERH, and set the G3CMS0, G3CMS1, G2CMS0, and G2CMS1
3. When compare match A occurs, the NDRH contents are transferred to PODRH and output.
4. Five-phase overlapping pulse output (one or two phases active at a time) can be obtained
Rev. 7.00 Sep. 11, 2009 Page 294 of 566
REJ09B0211-0700
TGRA
H'0000
NDRH
PODRH
PO15
PO14
PO13
PO11
TCNT value
PO12
a frequency in TGRA so the counter will be cleared on compare match A. Set the TGIEA bit
of TIER to 1 to enable the compare match/input capture A (TGIA) interrupt.
bits in PCR to select compare match in the TPU channel set up in the previous step to be the
output trigger. Write output data H'80 in NDRH.
The TGIA interrupt handling routine writes the next output data (H'C0) in NDRH.
subsequently by writing H'40, H'60, H'20, H'30. H'10, H'18, H'08, H'88, ... at successive TGIA
interrupts. If the DTC is set for activation by this interrupt, pulse output can be obtained
without imposing a load on the CPU.
Example of Normal Pulse Output (Example of Five-Phase Pulse Output)
Figure 12.5 Normal Pulse Output Example (Five-Phase Pulse Output)
00
80
TCNT
80
C0
C0
40
40
60
Compare match
60
20
20
30
30
10
10
18
18
08
08
88
88
80
80
C0
C0
40
Time

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