HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 189

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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9.7.2
PDDR is an 8-bit readable/writable register that stores output data for the port D pins.
9.7.3
PORTD is an 8-bit read-only register that shows port D pin states.
PORTD cannot be modified.
Note:
Bit
7
6
5
4
3
2
1
0
Bit
7
6
5
4
3
2
1
0
Bit Name
PD7DR
PD6DR
PD5DR
PD4DR
PD3DR
PD2DR
PD1DR
PD0DR
Bit Name
PD7
PD6
PD5
PD4
PD3
PD2
PD1
PD0
* Determined by the states of pins PD7 to PD0.
Port D Data Register (PDDR)
Port D Register (PORTD)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
Undefined *
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
R
R
R
R
R
R
Description
Output data for a pin is stored when the pin is
specified as a general purpose I/O port.
Description
If a port D read is performed while PDDDR bits are
set to 1, the PDDR values are read. If a port D read
is performed while PDDDR bits are cleared to 0, the
pin states are read.
Rev. 7.00 Sep. 11, 2009 Page 153 of 566
Section 9 I/O Ports
REJ09B0211-0700

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