HD64F2612FA20 Renesas Electronics America, HD64F2612FA20 Datasheet - Page 320

IC H8S MCU FLASH 128K 80QFP

HD64F2612FA20

Manufacturer Part Number
HD64F2612FA20
Description
IC H8S MCU FLASH 128K 80QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2600r
Datasheets

Specifications of HD64F2612FA20

Core Processor
H8S/2600
Core Size
16-Bit
Speed
20MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
43
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
80-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-

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Price
Part Number:
HD64F2612FA20
Manufacturer:
RENESAS/瑞萨
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Section 12 Programmable Pulse Generator (PPG)
12.3.1
NDERH and NDERL are an 8-bit readable/writable register that enables or disables pulse output
on a bit-by-bit basis. The corresponding DDR also needs to be set to 1 in order to enable pulse
output by the PPG.
NDERH
Bit
7
6
5
4
3
2
1
0
NDERL
Bit
7
6
5
4
3
2
1
0
Rev. 7.00 Sep. 11, 2009 Page 284 of 566
REJ09B0211-0700
Bit Name
NDER15
NDER14
NDER13
NDER12
NDER11
NDER10
NDER9
NDER8
Bit Name
NDER7
NDER6
NDER5
NDER4
NDER3
NDER2
NDER1
NDER0
Next Data Enable Registers H, L (NDERH, NDERL)
Initial Value
0
0
0
0
0
0
0
0
Initial Value
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
Next Data Enable 8 to 15
When a bit is set to 1 for pulse output by NDRH,
the value in the corresponding NDRH bit is
transferred to the PODRH bit by the selected output
trigger. Values are not transferred from NDRH to
PODRH for cleared bits.
Description
Next Data Enable 0 to 7
When a bit is set to 1 for pulse output by NDRL, the
value in the corresponding NDRL bit is transferred
to the PODRL bit by the selected output trigger.
Values are not transferred from NDRL to PODRL
for cleared bits.

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