UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 145

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UPD70F3713GC-8BS-A

Manufacturer Part Number
UPD70F3713GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3713GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3713GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
6.4
(1) TMPn control register 0 (TPnCTL0)
Note The TPnOPT0.TPnOVF bit and 16-bit counter are reset simultaneously.
Cautions 1. Set the TPnCKS2 to TPnCKS0 bits when the TPnCE bit = 0.
Remark
Registers
The TPnCTL0 register is an 8-bit register that controls the operation of TMPn.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The same value can always be written to the TPnCTL0 register by software.
(TOP00, TOP01, TOP21, and TOP31 pins) are reset to the TPmIOC0 register set status at the same time
as the 16-bit counter.
m = 0, 2, 3)
2. Be sure to clear bits 3 to 6 to “0”.
f
(n = 0 to 3,
XX
TPnCTL0
: Peripheral clock
When the value of the TPnCE bit is changed from 0 to 1, the TPnCKS2 to TPnCKS0 bits can
be set simultaneously.
After reset: 00H
TPnCKS2
TPnCE
TPnCE
<7>
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
0
1
0
0
0
0
1
1
1
1
TMPn operation disabled (TMPn reset asynchronously
TMPn operation enabled. TMPn operation start
TPnCKS1
R/W
6
0
0
0
1
1
0
0
1
1
User’s Manual U17716EJ2V0UD
Address: TP0CTL0 FFFFF640H, TP1CTL0 FFFFF660H,
TPnCKS0
5
0
0
1
0
1
0
1
0
1
TP2CTL0 FFFFF680H, TP3CTL0 FFFFF6A0H
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
4
0
TMPn operation control
/2
/4
/8
/16
/32
/64
/128
Internal count clock selection
3
0
TPnCKS2 TPnCKS1 TPnCKS0
2
Note
)
1
Moreover, timer outputs
0
143

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