UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 246

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

7.4
244
(1) TMQn control register 0 (TQnCTL0)
(2) TMQn control register 1 (TQnCTL1)
Note The TQnOPT0.TQnOVF bit and 16-bit counter are reset simultaneously.
Cautions 1. Set the TQnCKS2 to TQnCKS0 bits when the TQnCE bit = 0.
Remark
Registers
The TQnCTL0 register is an 8-bit register that controls the TMQn operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
The same value can always be written to the TQnCTL0 register by software.
The TQnCTL1 register is an 8-bit register that controls the TMQn operation.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
(TOQ00, TOQ01/TOQH01, TOQ02, TOQ03/TOQH02, TOQH03, and TOQ10 pins) are reset to the
TQnIOC0 register set status at the same time as the 16-bit counter.
2. Be sure to clear bits 3 to 6 to “0”.
f
XX
TQnCTL0
(n = 0, 1)
: Peripheral clock
When the value of the TQnCE bit is changed from 0 to 1, the TQnCKS2 to TQnCKS0 bits can
be set simultaneously.
After reset: 00H
TQnCKS2
TQnCE
TQnCE
<7>
0
1
0
0
0
0
1
1
1
1
CHAPTER 7 16-BIT TIMER/EVENT COUNTER Q (TMQ)
TQnCKS1
TMQn operation disabled (TMQn reset asynchronously
TMQn operation enabled. Start TMQn operation
R/W
6
0
0
0
1
1
0
0
1
1
Address: TQ0CTL0 FFFFF5C0H, TQ1CTL0 FFFFF600H
User’s Manual U17716EJ2V0UD
TQnCKS0
5
0
0
1
0
1
0
1
0
1
f
f
f
f
f
f
f
f
XX
XX
XX
XX
XX
XX
XX
XX
TMQn operation control
4
0
/2
/4
/8
/16
/32
/64
/128
Internal count clock selection
3
0
TQnCKS2 TQnCKS1 TQnCKS0
2
Note
1
)
Moreover, timer outputs
0