UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 162

• Manufacturer Part Number: UPD70F3713GC-8BS-A
• Description: MCU 32BIT V850ES/LX2 64-LQFP
• Manufacturer: Renesas Electronics America
• Series: V850ES/Ix2r

Specifications of UPD70F3713GC-8BS-A

• Core Processor: RISC
• Core Size: 32-Bit
• Speed: 20MHz
• Connectivity: CSI, UART/USART
• Peripherals: LVD, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Ram Size: 6K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

160
(2) Anytime write and batch write
Note The 16-bit counter is not cleared upon a match between the value of the 16-bit counter and the value of
Remarks 1. The above flowchart illustrates an example of the operation in the interval timer mode.
(e) Interrupt operation
The TPnCCR0 and TPnCCR1 registers in TMPn can be rewritten during timer operation (TPnCTL0.TPnCE bit
= 1), but the write method (anytime write, batch write) of the CCR0 and CCR1 buffer registers differs
depending on the mode.
(a) Anytime write
the CCR1 buffer register. It is cleared upon a match between the value of the 16-bit counter and the
value of the CCR0 buffer register.
TMPn generates the following three types of interrupt request signals.
• INTTPnCC0 interrupt: This signal functions as a match interrupt request signal of the CCR0 buffer
• INTTPnCC1 interrupt: This signal functions as a match interrupt request signal of the CCR1 buffer
• INTTPnOV interrupt:
In this mode, data is transferred at any time from the TPnCCR0 and TPnCCR1 registers to the CCR0 and
CCR1 buffer registers during timer operation (n = 0 to 3).
2. n = 0 to 3, a = 0, 1
• Set values to TPnCCRa register
• Timer operation enable
→
Timer operation
•
•
•
Figure 6-5. Flowchart of Basic Operation for Anytime Write
(TPnCE bit = 1)
→
Transfer to CCRa buffer register
Match between 16-bit counter
and CCR1 buffer register
Match between 16-bit counter
and CCR0 buffer register
16-bit counter clear & start
TPnCCRa register rewrite
Transfer values of TPnCCRa
register to CCRa buffer
register
CHAPTER 6 16-BIT TIMER/EVENT COUNTER P (TMP)
Initial settings
register and as a capture interrupt request signal to the TPnCCR0 register.
register and as a capture interrupt request signal to the TPnCCR1 register.
This signal functions as an overflow interrupt request signal.
START
User’s Manual U17716EJ2V0UD
Note
INTTPnCC1 signal output
INTTPnCC0 signal output