UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 628

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UPD70F3713GC-8BS-A

Manufacturer Part Number
UPD70F3713GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3713GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3713GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
626
(4) RESET pin
(5) Port pins
(6) Other signal pins
(7) Power supply
When the reset signals of the dedicated flash memory programmer are connected to the RESET pin that is
connected to the reset signal generator on-board, a conflict of signals occurs. To avoid the conflict of signals,
isolate the connection to the reset signal generator.
When a reset signal is input from the user system in the flash memory programming mode, the programming
operation will not be performed correctly. Therefore, do not input signals other than the reset signals from the
dedicated flash memory programmer.
When the system shifts to the flash memory programming mode, all the pins that are not used for flash
memory programming are in the same status as that immediately after reset. If the external device connected
to each port does not recognize the status of the port immediately after reset, pins require appropriate
processing, such as connecting to V
Connect X1, X2, and REGC in the same status as that in the normal operation mode.
Supply the same power (V
operation mode.
V850ES/IE2
RESET
In the flash memory programming mode, the signal the reset signal generator
outputs conflicts with the signal the dedicated flash memory programmer outputs.
Therefore, isolate the signals on the reset signal generator side.
Figure 18-14. Conflict of Signals (RESET Pin)
Conflict of signals
DD
, V
SS
, EV
CHAPTER 18 FLASH MEMORY
DD
via a resistor or connecting to V
User’s Manual U17716EJ2V0UD
DD
, EV
Reset signal generator
SS
Dedicated flash memory
programmer connection pin
, AV
Output pin
SS0
, AV
SS1
, AV
DD0
SS
, AV
via a resistor.
DD1
, AV
REF0
, AV
REF1
) as in normal

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