UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 442

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UPD70F3713GC-8BS-A

Manufacturer Part Number
UPD70F3713GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet

Specifications of UPD70F3713GC-8BS-A

Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

Available stocks

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Part Number
Manufacturer
Quantity
Price
Part Number:
UPD70F3713GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
440
(1) Trigger mode
There are two types of trigger modes that serve as the start timing of an A/D conversion operation: software
trigger mode and hardware trigger mode. There are two types of hardware trigger modes: external trigger
mode and timer trigger mode.
These trigger modes are set by the ADAnM0 and ADAnM2 registers.
Remark
(a) Software trigger mode
Of the ANIn0 to ANIn3 pins, the analog input pin specified by the ADAnS.ADAnS1 and ADAnS.ADAnS0
bits is used for the A/D conversion start timing when the ADAnM0.ADAnCE bit is set to 1 in this mode.
After end of A/D conversion, the conversion result is stored in A/Dn conversion result register m
(ADAnCRm) (m = 0 to 3). At the same time, an A/Dn conversion end interrupt request signal (INTADn) is
generated.
If the operation mode set by the ADAnM0.ADAnMD1 and ADAnM0.ADAnMD0 bits is the continuous select
mode or continuous scan mode, the conversion operation is repeated unless the ADAnM0.ADAnCE bit is
cleared to 0. In the one-shot select mode or one-shot scan mode, the conversion operation is stopped
after A/D conversion ends.
When conversion is started, the ADAnM0.ADAnEF bit is set to 1 (conversion in progress).
If the ADAnM0, ADAnM2, and ADAnS registers are written during A/D conversion, the conversion is
stopped and executed again from the beginning.
Remark
n = 0, 1
n = 0, 1
m = 0 to 3
CHAPTER 11 A/D CONVERTERS 0 AND 1
User’s Manual U17716EJ2V0UD

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