UPD70F3713GC-8BS-A Renesas Electronics America, UPD70F3713GC-8BS-A Datasheet - Page 568
UPD70F3713GC-8BS-A
Manufacturer Part Number
UPD70F3713GC-8BS-A
Description
MCU 32BIT V850ES/LX2 64-LQFP
Manufacturer
Renesas Electronics America
Series
V850ES/Ix2r
Datasheet
1.UPD70F3713GC-8BS-A.pdf
(674 pages)
Specifications of UPD70F3713GC-8BS-A
Core Processor
RISC
Core Size
32-Bit
Speed
20MHz
Connectivity
CSI, UART/USART
Peripherals
LVD, PWM, WDT
Number Of I /o
39
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Ram Size
6K x 8
Voltage - Supply (vcc/vdd)
3.5 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
*
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Available stocks
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Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
UPD70F3713GC-8BS-A
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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14.4 External Interrupt Request Input Pins (INTP0 to INTP6)
14.4.1 Noise elimination
566
(1) Noise elimination of INTP0 to INTP5 pins
(2) Noise elimination of INTP6 pin
The INTP0 to INTP5 pins incorporate a noise eliminator that uses analog delay. Unless, therefore, the input
level of each pin is held for a certain time, an edge cannot be detected. An edge is detected after a certain
time has elapsed.
The INTP6 pin incorporates a digital noise eliminator.
The sampling clock that performs digital sampling can be selected from f
The system clock stops in the IDLE and STOP modes, so the INTP6 pin cannot be used to cancel the IDLE
and STOP modes.
(a) External interrupt noise elimination control register (INTPNRC)
The INTPNRC register is used to select the sampling clock that is used to eliminate digital noise on the
INTP6 pin. If the same level is not detected five times in a row, the signal is eliminated as noise.
This register can be read or written in 8-bit or 1-bit units.
Reset sets this register to 00H.
Cautions 1. If the input pulse lasts for the duration of 4 to 5 clocks, it is undefined whether the
INTPNRC
After reset: 00H
2. If noise is generated in synchronization with the sampling clock, eliminate the noise
3. Noise is not eliminated if the pin is used as a normal input port pin.
INTPNRC1
CHAPTER 14 INTERRUPT/EXCEPTION PROCESSING FUNCTION
pulse is detected as a valid edge or eliminated as noise. So that the pulse is
actually detected as a valid edge, the same pulse level must be input for the
duration of 5 clocks or more.
by attaching a filter to the input pin.
0
0
1
1
0
7
INTPNRC0
R/W
0
1
0
1
6
0
User’s Manual U17716EJ2V0UD
Address: FFFFF310H
f
f
f
f
XX
XX
XX
XX
/16
/8
/4
/2
5
0
4
0
Selection of sampling clock
3
0
2
0
XX
/2, f
INTPNRC1 INTPNRC0
XX
/4, f
1
XX
/8, or f
0
XX
/16.
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