HD64F2319VTE25 Renesas Electronics America, HD64F2319VTE25 Datasheet - Page 1012
HD64F2319VTE25
Manufacturer Part Number
HD64F2319VTE25
Description
IC H8S MCU FLASH 512K 100-QFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Specifications of HD64F2319VTE25
Core Processor
H8S/2000
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
71
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
HD64F2319VTE25
Manufacturer:
Renesas Electronics America
Quantity:
10 000
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Appendix B Internal I/O Registers
TSR5—Timer Status Register 5
Rev.7.00 Feb. 14, 2007 page 978 of 1108
REJ09B0089-0700
Bit
Initial value
Read/Write
Note: * Can only be written with 0 for flag clearing.
:
:
:
Count Direction Flag
TCFD
0
1
R
7
1
TCNT counts down
TCNT counts up
⎯
⎯
6
1
Underflow Flag
R/(W)*
TCFU
0
1
5
0
[Setting condition]
[Clearing condition]
When 0 is written to TCFU after reading TCFU = 1
When the TCNT value underflows (changes from H'0000 to H'FFFF)
Overflow Flag
R/(W)*
TCFV
0
1
4
0
[Setting condition]
When the TCNT value overflows (changes from H'FFFF to H'0000 )
[Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
⎯
⎯
3
0
⎯
⎯
2
0
Input Capture/Output Compare Flag B
R/(W)*
TGFB
0
1
1
0
[Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
• When TCNT value is transferred to TGRB by input
[Clearing conditions]
• When DTC is activated by TGIB interrupt while DISEL
• When 0 is written to TGFB after reading TGFB = 1
Input Capture/Output Compare Flag A
output compare register
capture signal while TGRB is functioning as input
capture register
bit of MRB in DTC is 0
0
1
R/(W)*
TGFA
0
0
[Clearing conditions]
• When DTC is activated by TGIA interrupt while
• When 0 is written to TGFA after reading TGFA = 1
[Setting conditions]
• When TCNT = TGRA while TGRA is functioning
• When TCNT value is transferred to TGRA by
H'FEA5
DISEL bit of MRB in DTC is 0
as output compare register
input capture signal while TGRA is functioning
as input capture register
TPU5
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