HD64F2319VTE25 Renesas Electronics America, HD64F2319VTE25 Datasheet - Page 766

• Manufacturer Part Number: HD64F2319VTE25
• Description: IC H8S MCU FLASH 512K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2319VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Section 17 ROM
A single divided block is erased by one erasing processing. For block divisions, refer to figure
17.63, Block Division of User MAT. To erase two or more blocks, update the erase block number
and perform the erasing processing for each block.
[1] Select the on-chip program to be downloaded
The procedures to be carried out after setting FKEY, e.g. download and initialization, are the same
as those in the programming procedure. For details, refer to Programming Procedure in User
Program Mode in section 17.24.2, User Program Mode.
[2] Set the FEBS parameter necessary for erasure
[3] Erasure
• The general registers other than ER0 and ER1 are saved in the erasing program.
• R0 is a return value of the FPFR parameter.
• Since the stack area is used in the erasing program, a stack area of a maximum 128 bytes must
[4] The return value in the erasing program, FPFR (general register R0L) is judged.
[5] Determine whether erasure of the necessary blocks has finished.
Rev.7.00 Feb. 14, 2007 page 732 of 1108
REJ09B0089-0700
MOV.L #DLTOP+16,ER2
JSR
NOP
Set the EPVB bit in FECS to 1.
Several programming/erasing programs cannot be selected at one time. If several programs are
set, download is not performed and a download error is returned to the source select error
detect (SS) bit in the DPFR parameter.
Set the erase block number of the user MAT in the flash erase block select parameter FEBS
(general register ER0). If a value other than an erase block number of the user MAT is set, no
block is erased even though the erasing program is executed, and an error is returned to the
return value parameter FPFR.
Similar to as in programming, there is an entry point of the erasing program in the area from
(download start address set by FTDAR) + 16 bytes of on-chip RAM. The subroutine is called
and erasing is executed by using the following steps.
be reserved in RAM
If more than one block is to be erased, update the FEBS parameter and repeat steps (b) to (e).
Blocks that have already been erased can be erased again.
@ER2
; Set entry address to ER2
; Call erasing routine