HD64F2319VTE25 Renesas Electronics America, HD64F2319VTE25 Datasheet - Page 477

• Manufacturer Part Number: HD64F2319VTE25
• Description: IC H8S MCU FLASH 512K 100-QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8S/2300r

Specifications of HD64F2319VTE25

• Core Processor: H8S/2000
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: POR, PWM, WDT
• Number Of I /o: 71
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit 3—Multiprocessor Interrupt Enable (MPIE): Enables or disables multiprocessor interrupts.
The MPIE bit setting is only valid in asynchronous mode when the MP bit in SMR is set to 1.
The MPIE bit setting is invalid in synchronous mode or when the MP bit is cleared to 0.
Bit 3
MPIE
0
1
Note: * When receive data including MPB = 0 is received, receive data transfer from RSR to RDR,
Bit 2—Transmit End Interrupt Enable (TEIE): Enables or disables transmit-end interrupt
(TEI) request generation when there is no valid transmit data in TDR in MSB data transmission.
Bit 2
TEIE
0
1
Note: * TEI cancellation can be performed by reading 1 from the TDRE flag in SSR, then clearing it
receive error detection, and setting of the RDRF, FER, and ORER flags in SSR, is not
performed. When receive data including MPB = 1 is received, the MPB bit in SSR is set to
1, the MPIE bit is cleared to 0 automatically, and generation of RXI and ERI interrupts
(when the TIE and RIE bits in SCR are set to 1) and FER and ORER flag setting is enabled.
to 0 and clearing the TEND flag to 0, or by clearing the TEIE bit to 0.
Description
Multiprocessor interrupts disabled (normal reception performed)
[Clearing conditions]
•
•
Multiprocessor interrupts enabled *
Receive-data-full interrupt (RXI) requests, receive-error interrupt (ERI) requests, and
setting of the RDRF, FER, and ORER flags in SSR are disabled until data with the
multiprocessor bit set to 1 is received.
Description
Transmit end interrupt (TEI) request disabled *
Transmit end interrupt (TEI) request enabled *
When the MPIE bit is cleared to 0
When data with MPB = 1 is received
Section 12 Serial Communication Interface (SCI)
Rev.7.00 Feb. 14, 2007 page 443 of 1108
REJ09B0089-0700
(Initial value)
(Initial value)