AT89LP52-20MU Atmel, AT89LP52-20MU Datasheet - Page 23

• Manufacturer Part Number: AT89LP52-20MU
• Description: IC MCU 8051 8K FLASH SPI 44VQFN
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP52-20MU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VFQFN Exposed Pad
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: Serial
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

4. Special Function Registers
Table 4-1.
Notes:
3709B–MICRO–12/10
0E8H
0E0H
0D8H
0D0H
0C8H
0C0H
0B8H
0B0H
0A8H
0A0H
0F8H
0F0H
98H
90H
88H
80H
1. All SFRs in the left-most column are bit-addressable.
2. Reset value is 0101 0101B when Tristate-Port Fuse is enabled and 0000 0011B when disabled.
3. Reset value is 0101 0010B when Compatibility mode is enabled and 0000 0000B when disabled.
0000 0000
0000 0000
0000 0000
0000 0000
1111 1111
1111 1111
1111 1111
0000 0000
1111 1111
0000 0000
1111 1111
xx00 0000
0x00 0000
T2CON
SCON
TCON
PSW
ACC
P4
P3
P2
P1
P0
IP
IE
B
8
0
AT89LP51/52 SFR Map and Reset Values
0000 0000
0000 0000
0000 0000
0000 0000
0000 0111
000x xxxx
xxxx xxxx
T2MOD
SADDR
TCONB
SADEN
PMOD
TMOD
SBUF
A map of the on-chip memory area called the Special Function Register (SFR) space is shown in
Table
Note that not all of the addresses are occupied, and unoccupied addresses may not be imple-
mented on the chip. Read accesses to these addresses will in general return random data, and
write accesses will have an indeterminate effect. User software should not write to these unlisted
locations, since they may be used in future products to invoke new features.
SP
(2)
9
1
4-1.
0000 0000
0000 0000
0000 00x0
0000 000
RCAP2L
AUXR1
DP0L
TL0
A
2
0000 0000
0000 0000
0000 0000
RCAP2H
DP0H
TL1
B
3
0000 0000
0000 0000
0000 000
DP1L
TH0
TL2
C
4
AT89LP51/52 - Preliminary
0000 0000
0000 0000
0000 0000
DP1H
TH2
TH1
D
5
(write-only)
0000 0000
MEMCON
0000 00xx
WDTRST
AUXR
E
6
000x 0000
xx00 0000
0000 0xx0
WDTCON
CLKREG
PCON
IPH
(3)
F
7
0FFH
0F7H
0EFH
0E7H
0DFH
0D7H
0CFH
0C7H
0BFH
0B7H
0AFH
0A7H
9FH
97H
8FH
87H
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