AT89LP52-20MU Atmel, AT89LP52-20MU Datasheet - Page 53

IC MCU 8051 8K FLASH SPI 44VQFN

AT89LP52-20MU

Manufacturer Part Number
AT89LP52-20MU
Description
IC MCU 8051 8K FLASH SPI 44VQFN
Manufacturer
Atmel
Series
89LPr
Datasheet

Specifications of AT89LP52-20MU

Core Processor
8051
Core Size
8-Bit
Speed
20MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.4 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VFQFN Exposed Pad
Processor Series
AT89x
Core
8051
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
Serial
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
36
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
 Details

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
AT89LP52-20MU
Manufacturer:
Atmel
Quantity:
490
Figure 12-2. Timer 2 Diagram: Auto-Reload Mode (DCEN = 0)
Figure 12-3. Timer 2 Waveform: Auto-Reload Mode (DCEN = 0)
12.3.2
Figure 12-4. Timer 2 Waveform: Auto-Reload Mode (DCEN = 1)
3709B–MICRO–12/10
Up or Down Counter
OSC
BOTTOM
BOTTOM
÷CDV
T2EX
EXF2
Setting DCEN = 1 enables Timer 2 to count up or down, as shown in
the T2EX pin controls the direction of the count (if EXEN2 = 1). A logic 1 at T2EX makes Timer 2
count up. When T2CM
also causes BOTTOM, the 16-bit value in RCAP2H and RCAP2L, to be reloaded into the timer
registers, TH2 and TL2, respectively. A logic 0 at T2EX makes Timer 2 count down. The timer
underflows when TH2 and TL2 equal BOTTOM, the 16-bit value stored in RCAP2H and
RCAP2L. The underflow sets the TF2 bit and causes MAX to be reloaded into the timer regis-
ters. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th
bit of resolution. In this operating mode, EXF2 does not flag an interrupt.
The behavior of Timer 2 when DCEN is enabled is shown in
MAX
MAX
MIN
MIN
÷TPS
1-0
= 00B, the timer will overflow at MAX and set the TF2 bit. This overflow
TL2
AT89LP51/52 - Preliminary
TH2
Figure
TF2 Set
12-4.
TF2 Set
Figure
12-5. In this mode,
53

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