AT89LP52-20MU Atmel, AT89LP52-20MU Datasheet - Page 84

• Manufacturer Part Number: AT89LP52-20MU
• Description: IC MCU 8051 8K FLASH SPI 44VQFN
• Manufacturer: Atmel
• Series: 89LPr

Specifications of AT89LP52-20MU

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: EBI/EMI, I²C, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 36
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-VFQFN Exposed Pad
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: Serial
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 36
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Table 17-2.
Notes:
84
Command
Program Enable
Parallel Enable
Chip Erase
Read Status
Write Code Byte
Read Code Byte
Write Code Page
Write Code Page with Auto-Erase
Read Code Page
Write Data Byte
Read Data Byte
Write Data Page
Write Data Page with Auto-Erase
Read Data Page
Write User Fuse
Read User Fuse
Write User Fuses
Write User Fuses with Auto-Erase
Read User Fuses
Write Lock Mode
Read Lock Mode
Write Lock Bit
Write Lock Bits
Read Lock Bits
Write User Signature Byte
Read User Signature Byte
Write User Signature Page
Write User Signature Page with Auto-Erase
Read User Signature Page
Read Atmel Signature Byte
Read Atmel Signature Page
1. Program Enable must be the first command issued after entering into programming mode.
2. 0110 1001B is returned on MISO when Program Enable was successful.
3. Parallel Enable switches the interface from serial to parallel format until RST goes inactive.
4. Each byte address selects one fuse or lock bit. Data bytes must be 00h or FFh.
5. See
6. See
AT89LP51/52 - Preliminary
(6)
(3)
(6)
(6)
(1)
(5)
(5)
Programming Command Summary
(6)
(6)
(5)
(5)
Table 17-5 on page 86
Table 17-4 on page 86
(7)
(7)
(5)
for Fuse definitions.
for Lock Bit definitions.
1010 1100
1010 1100
1010 1100
0110 0000
0100 0000
0010 0000
0101 0000
0111 0000
0011 0000
1100 0000
1010 0000
1101 0000
1101 0010
1011 0000
0100 0001
0010 0001
0101 0001
0111 0001
0011 0001
1010 1100
0010 0100
0100 0100
0101 0100
0011 0100
0100 0010
0010 0010
0101 0010
0111 0010
0011 0010
0010 1000
0011 1000
Opcode
Addr High
1110 00BB
0101 0011
0011 0101
000a aaaa
000a aaaa
000a aaaa
000a aaaa
000a aaaa
100x xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
as00 0000
as00 0000
as00 0000
as00 0000
as00 0000
as00 0000
00bb bbbb
00bb bbbb
0000 0000
0000 0000
0000 0000
00bb bbbb
0000 0000
0000 0000
as00 0000
as00 0000
as00 0000
0s00 0000
Addr Low
asbb bbbb
asbb bbbb
asbb bbbb
asbb bbbb
asbb bbbb
asbb bbbb
0sbb bbbb
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
(0110 1001)
Fuse Out
Status Out
xxxL LLxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
xxxx xxxx
Fuse In
Data In
Data Out
Data Out
Fuse 0
Fuse 0
Fuse 0
Data Out
Data Out
Byte 0
Byte 0
Data In
Data In
Data In
Data 0
Byte 0
Byte 0
Byte 0
Byte 0
Byte 0
Byte 0
Byte 0
Byte 0
Byte 0
Byte 0
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(4)
(2)
3709B–MICRO–12/10
Fuses 1–63
Fuses 1–63
Bytes 1–63
Bytes 1–63
Bytes 1–63
Bytes 1–63
Bytes 1–63
Bytes 1–63
Bytes 1–63
Bytes 1–63
Bytes 1–63
Data 1–63
Byte 1–63
Byte 1–63
Byte 1–63
Byte 1–63
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
(4)
(4)
(4)
(4)