WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 153

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WG82574IT S LBAC

Manufacturer Part Number
WG82574IT S LBAC
Description
CONTROLLER, ENET, INTEL 82574IT, 64PQFN
Manufacturer
Intel
Datasheet

Specifications of WG82574IT S LBAC

Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Inline Functions—82574 GbE Controller
IPv6 hash types:
When a packet cannot be parsed by the above rules, it enters hardware queue 0. The
32-bit tag (normally a result of the hash function) equals zero. The 5-bit MRQ field
equals zero as well.
The 32-bit result of the hash computation is written into the packet descriptor and also
provides an index into the redirection table.
The following notation is used to describe the hash functions below:
All hash function variations (IPv4 and IPv6) follow the same general structure. Specific
details for each variation are described in the following section. The hash uses a
random secret key of length 320 bits (40 bytes); the key is generated through the RSS
Random Key (RSSRK) register.
The algorithm works by examining each bit of the hash input from left to right. Our
nomenclature defines left and right for a byte-array as follows: Given an array K with k
bytes, our nomenclature assumes that the array is laid out as follows:
K[0] K[1] K[2] … K[k-1]
K[0] is the left-most byte, and the MSB of K[0] is the left-most bit. K[k-1] is the right-
most byte, and the LSB of K[k-1] is the right-most bit.
ComputeHash(input[], N)
For hash-input input[] of length N bytes (8N bits) and a random secret key K of 320
bits
Result = 0;
For each bit b in input[] {
if (b == 1) then Result ^= (left-most 32 bits of K);
shift K left 1 bit position;
}
return Result;
• S2a - TcpIPv6 is enabled as defined above, or
• S2b - TcpIPv6, IPv6Ex, and IPv6 are enabled - the packet is first parsed according
• Ordering is little endian in both bytes and bits. For example, the IP address
• A " ^ " denotes bit-wise XOR operation of same-width vectors.
• @x-y denotes bytes x through y (including both of them) of the incoming packet,
• @x-y, @v-w denotes concatenation of bytes x-y, followed by bytes v-w, preserving
to TcpIPv6 rules. If not identified as a TcpIPv6 packet, it is then parsed as an
IPv6Ex packet. If the 82574 cannot parse extensions headers (such as an
unidentified extension in the packet), then the packet is parsed as IPv6.
161.142.100.80 translates into 0xa18e6450 in the signature.
where byte 0 is the first byte of the IP header. In other words, we consider all byte-
offsets as offsets into a packet where the framing layer header has been stripped
out. Therefore, the source IPv4 address is referred to as @12-15, while the
destination v4 address is referred to as @16-19.
the order in which they occurred in the packet.
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