WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 478
WG82574IT S LBAC
Manufacturer Part Number
WG82574IT S LBAC
Description
CONTROLLER, ENET, INTEL 82574IT, 64PQFN
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAC.pdf
(490 pages)
Specifications of WG82574IT S LBAC
Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Table 98.
478
General
Placement of
the 82574
PCIe
Interface
Clock Source
(Crystal
Option)
Section
Board Layout and Schematic Checklists
Board Layout Checklist
Obtain the most recent documentation
and specification updates.
Route the transmit and receive differential
traces before routing the digital traces.
Place the 82574 at least one inch from the
edge of the board.
Place the 82574 at least one inch from the
integrated magnetics module but less than
four inches.
Place the AC coupling capacitors on the
PCI Express* (PCIe*) Tx traces as close as
possible to the 82574 but not further than
250 mils.
Place the AC coupling capacitors on the
PCIe Rx traces as close as possible to the
upstream PCIe device but not further than
250 mils.
Make sure the trace impedance for the
PCIe differential pairs is 100 +/- 20%.
Match trace lengths within each PCIe pair
on a segment-by-segment basis. Match
trace lengths within a pair to five mils.
Place crystal within 0.75 inches of the
82574.
Place the crystal load capacitors within
0.09 inches of the crystal.
Keep clock lines away from other digital
traces (especially reset signals), I/O ports,
board edge, transformers and differential
pairs.
Check Item
82574 GbE Controller—Board Layout and Schematic Checklists
Documents are subject to frequent change.
Layout of differential traces is critical.
With closer spacing, fields can follow the surface of the
magnetics module or wrap past edge of the board. As a result,
EMI might increase. The optimum location is approximately
one inch behind the magnetics module.
Keep trace length under four inches from the 82574 through
the magnetics to the RJ-45 connector. Signal attenuation can
cause problems for traces longer than four inches. However,
due to near field EMI, the 82574 should be placed at least one
inch away from the magnetics module.
Size 0402, X7R is recommended. The AC coupling capacitors
should be placed near the transmitter for PCIe.
Size 0402, X7R is recommended. The AC coupling capacitors
should be placed near the transmitter for PCIe.
These traces should be routed differentially.
This reduces EMI.
This reduces EMI.
Remarks
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