WG82574IT S LBAC Intel, WG82574IT S LBAC Datasheet - Page 340
WG82574IT S LBAC
Manufacturer Part Number
WG82574IT S LBAC
Description
CONTROLLER, ENET, INTEL 82574IT, 64PQFN
Manufacturer
Intel
Datasheet
1.WG82574IT_S_LBAC.pdf
(490 pages)
Specifications of WG82574IT S LBAC
Ethernet Type
IEEE 802.3, IEEE 802.3u, IEEE 802.3ab
Supply Voltage Range
3V To 3.6V
Operating Temperature Range
-40°C To +85°C
Digital Ic Case Style
QFN
No. Of Pins
64
Package / Case
QFN
Interface Type
I2C, JTAG, PCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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Figure 65.
10.2.5.22
Note:
340
bank[1:0]
Figure 65
represents the internally stored ordering of the received DA. Note that bit 0 indicated in
this diagram is the first on the wire.
Multicast Table Array Algorithm
Receive Address Low - RAL (0x05400 + 8*n; RW)
While "n" is the exact unicast/multicast address entry and it is equals to 0,1,…15.
These registers contain the lower bits of the 48-bit Ethernet address. All 32 bits are
valid.
If the NVM is present the first register (RAL0) is loaded from the NVM.
These registers' addresses have been moved from where they were located in previous
devices. However, for backwards compatibility, these registers can also be accessed at
their alias offsets of 0x0040-0x000BC.
RAL
Field
shows the multicast lookup algorithm. The destination address shown
31:0
Bit(s)
47:40
X
Initial
Value
39:32
pointer[11:5]
word
Receive Address Low
The lower 32 bits of the 48-bit Ethernet address.
Destination Address
31:24
bit
pointer[4:0]
82574 GbE Controller—Driver Programing Interface
23:16
Multicast Table Array
(4096 bit vector)
Description
32 x 128
15:8
...
...
?
7:0
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